[llvm] Split vgpr regalloc pipeline (PR #93526)

[Christudasan Devadasan via llvm-commits]

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@@ -1608,6 +1605,25 @@ void SIFrameLowering::determineCalleeSaves(MachineFunction &MF,
     }
   }
 
+  SmallVector<Register> SortedWWMVGPRs;
+  for (Register Reg : MFI->getWWMReservedRegs()) {
+    // The shift-back is needed only for the VGPRs used for SGPR spills and they
+    // are of 32-bit size. SIPreAllocateWWMRegs pass can add tuples into WWM
+    // reserved registers.
+    const TargetRegisterClass *RC = TRI->getPhysRegBaseClass(Reg);
+    if (TRI->getRegSizeInBits(*RC) > 32)
+      continue;
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cdevadas wrote:

No. As the comment indicate, `SIPreAllocateWWMRegs` adds register tuples into `WWMReservedRegs` list. They're already from the lowest range, so attempting to shift them further is unnecessary.

https://github.com/llvm/llvm-project/pull/93526