[llvm] Split vgpr regalloc pipeline (PR #93526)

[Matt Arsenault via llvm-commits]

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@@ -1555,6 +1555,17 @@ void SIFrameLowering::determinePrologEpilogSGPRSaves(
   }
 }
 
+// Mark all WWM VGPRs as BB LiveIns.
+static void addWwmRegBBLiveIn(MachineFunction &MF) {
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arsenm wrote:

If the registers are reserved, they don't need to be made live in. It's one or the other 

https://github.com/llvm/llvm-project/pull/93526