[llvm] [AMDGPU] Prefer vector i8s in PHI Nodes (PR #91016)

Jeffrey Byrnes via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 13 12:10:45 PDT 2024


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@@ -1123,6 +1137,19 @@ Value *GCNTTIImpl::rewriteIntrinsicWithAddressSpace(IntrinsicInst *II,
   }
 }
 
+InstructionCost GCNTTIImpl::getPHIScalarizationOverhead(Type *ScalarTy,
+                                                        VectorType *VTy) {
+  if (DL.getTypeSizeInBits(ScalarTy) != 8)
+    return 0;
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jrbyrnes wrote:

Outdated

https://github.com/llvm/llvm-project/pull/91016


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