[llvm] [GISel][RISCV]Implement indirect parameter passing for large scalars (PR #95429)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff ae73706075bb2ea4bbc87c4b33f3b681555f8dfb 3db3254691292a7793877d8bcc28351060598ca9 -- llvm/lib/CodeGen/GlobalISel/CallLowering.cpp llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
index daa5e0c07e..ea9183359f 100644
--- a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
@@ -765,7 +765,7 @@ bool CallLowering::handleAssignments(ValueHandler &Handler,
       // If we can't directly assign the register, we need one or more
       // intermediate values.
       Args[i].Regs.resize(NumParts);
-    
+
       // When we have indirect parameter passing we are receiving a pointer,
       // that points to the actual value. In that case we need a pointer.
       if (VA.getLocInfo() == CCValAssign::Indirect &&
@@ -815,8 +815,9 @@ bool CallLowering::handleAssignments(ValueHandler &Handler,
               MIRBuilder.buildFrameIndex(PointerTy, FrameIdx)
                   ->getOperand(0)
                   .getReg();
-          Handler.assignValueToAddress(Args[i].OrigRegs[Part], PointerToStackReg,
-                                       OrigTy, MachinePointerInfo{}, VA);
+          Handler.assignValueToAddress(Args[i].OrigRegs[Part],
+                                       PointerToStackReg, OrigTy,
+                                       MachinePointerInfo{}, VA);
           Handler.assignValueToReg(PointerToStackReg, VA.getLocReg(), VA);
         }
         break;
@@ -906,8 +907,8 @@ bool CallLowering::handleAssignments(ValueHandler &Handler,
                                    MachinePointerInfo{}, VA);
 
     } else if (Handler.isIncomingArgumentHandler() && OrigVT != LocVT) {
-      // Now that all pieces have been assigned, re-pack the register typed values
-      // into the original value typed registers.
+      // Now that all pieces have been assigned, re-pack the register typed
+      // values into the original value typed registers.
       buildCopyFromRegs(MIRBuilder, Args[i].OrigRegs, Args[i].Regs, OrigTy,
                         LocTy, Args[i].Flags[0]);
     }
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
index b1f381f4b3..180e238a0a 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
@@ -92,10 +92,10 @@ struct RISCVOutgoingValueHandler : public CallLowering::OutgoingValueHandler {
     uint64_t Offset = 0;
     if (VA.isMemLoc())
       Offset = VA.getLocMemOffset();
-    
+
     // TODO: Move StackAlignment to subtarget and share with FrameLowering.
     auto *MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOStore, MemTy,
-                                       commonAlignment(Align(16), Offset));
+                                        commonAlignment(Align(16), Offset));
 
     Register ExtReg = extendRegister(ValVReg, VA);
     MIRBuilder.buildStore(ExtReg, Addr, *MMO);

``````````

</details>


https://github.com/llvm/llvm-project/pull/95429