[llvm] 3d35b94 - [X86][test] Pre-commit tests for https://github.com/llvm/llvm-project/issues/95412

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 13 07:54:43 PDT 2024


Author: Shengchen Kan
Date: 2024-06-13T22:54:22+08:00
New Revision: 3d35b94e3a9abcf5f703267c7653fd6ef39870b6

URL: https://github.com/llvm/llvm-project/commit/3d35b94e3a9abcf5f703267c7653fd6ef39870b6
DIFF: https://github.com/llvm/llvm-project/commit/3d35b94e3a9abcf5f703267c7653fd6ef39870b6.diff

LOG: [X86][test] Pre-commit tests for https://github.com/llvm/llvm-project/issues/95412

Added: 
    

Modified: 
    llvm/test/MC/Disassembler/X86/apx/rex2-format.txt
    llvm/test/MC/X86/apx/rex2-format-att.s
    llvm/test/MC/X86/apx/rex2-format-intel.s

Removed: 
    


################################################################################
diff  --git a/llvm/test/MC/Disassembler/X86/apx/rex2-format.txt b/llvm/test/MC/Disassembler/X86/apx/rex2-format.txt
index 1ac057c62a87c..7412e234bff36 100644
--- a/llvm/test/MC/Disassembler/X86/apx/rex2-format.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/rex2-format.txt
@@ -21,6 +21,12 @@
 # INTEL: movsxd	r17, r16d
 0xd5,0x58,0x63,0xc8
 
+# ATT: rep
+# ATT-SAME:   popcntl %r16d, %r17d
+# INTEL: rep
+# INTEL-SAME: popcnt r17d, r16d
+0xf3,0xd5,0xd0,0xb8,0xc8
+
 ## MRMSrcRegCC
 
 # ATT:   cmovll	%r16d, %eax

diff  --git a/llvm/test/MC/X86/apx/rex2-format-att.s b/llvm/test/MC/X86/apx/rex2-format-att.s
index 3dacd2a82876a..a285f8743ccd7 100644
--- a/llvm/test/MC/X86/apx/rex2-format-att.s
+++ b/llvm/test/MC/X86/apx/rex2-format-att.s
@@ -20,6 +20,10 @@
 # CHECK: encoding: [0xd5,0x58,0x63,0xc8]
          movslq	%r16d, %r17
 
+# CHECK: popcntl %r16d, %r17d
+# CHECK: encoding: [0xf3,0xd5,0xd0,0xb8,0xc8]
+         popcntl %r16d, %r17d
+
 ## MRMSrcRegCC
 
 # CHECK: cmovll	%r16d, %eax

diff  --git a/llvm/test/MC/X86/apx/rex2-format-intel.s b/llvm/test/MC/X86/apx/rex2-format-intel.s
index 935bd86537af1..687cb777647b2 100644
--- a/llvm/test/MC/X86/apx/rex2-format-intel.s
+++ b/llvm/test/MC/X86/apx/rex2-format-intel.s
@@ -20,6 +20,10 @@
 # CHECK: encoding: [0xd5,0x58,0x63,0xc8]
          movsxd	r17, r16d
 
+# CHECK: popcnt r17d, r16d
+# CHECK: encoding: [0xf3,0xd5,0xd0,0xb8,0xc8]
+         popcnt r17d, r16d
+
 ## MRMSrcRegCC
 
 # CHECK: cmovl	eax, r16d


        


More information about the llvm-commits mailing list