[llvm] [X86] Lower vXi8 multiplies by constant using PMADDUBSW on SSSE3+ targets (PR #95403)

[Phoebe Wang via llvm-commits]

phoebewang wrote:

> This patch limits the lowering to multiply by constants, but most targets would benefit from performing this for non-constant cases as well - its just Intel Core/SandyBridge era CPUs that might experience additional Port0/5 contention.

Do you mean the problem that early Core CPUs' TP = 1? https://uops.info/table.html?search=PMADDUBSW&cb_lat=on&cb_tp=on&cb_uops=on&cb_ports=on&cb_SNB=on&cb_IVB=on&cb_SKL=on&cb_AMT=on&cb_ZEN3=on&cb_measurements=on&cb_doc=on&cb_base=on&cb_avx=on&cb_avx2=on&cb_sse=on
Or pand/pandn's TP=0.33? https://uops.info/table.html?search=pand&cb_lat=on&cb_tp=on&cb_uops=on&cb_ports=on&cb_SNB=on&cb_IVB=on&cb_SKL=on&cb_ADLP=on&cb_ZEN3=on&cb_measurements=on&cb_doc=on&cb_base=on&cb_avx=on&cb_avx2=on&cb_sse=on

The latter seems in latest CPUs as well.

https://github.com/llvm/llvm-project/pull/95403