[llvm] [AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (PR #95236)

via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 13 06:07:34 PDT 2024


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@@ -700,10 +701,10 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
       // If both RB are null that means both registers are generic.
       // We shouldn't be here.
       assert(DstRB && SrcRB && "Both RegBank were nullptr");
-      unsigned Size = getSizeInBits(DstReg, MRI, TRI);
+      TypeSize Size = getSizeInBits(DstReg, MRI, TRI);
       return getInstructionMapping(
-          DefaultMappingID, copyCost(*DstRB, *SrcRB, TypeSize::getFixed(Size)),
-          getCopyMapping(DstRB->getID(), SrcRB->getID(), Size),
+          DefaultMappingID, copyCost(*DstRB, *SrcRB, Size),
+          getCopyMapping(DstRB->getID(), SrcRB->getID(), Size.getKnownMinValue()),
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Him188 wrote:

Sounds better. Done

https://github.com/llvm/llvm-project/pull/95236


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