[llvm] [DAG] getOperationAction - always return Custom action for target opcodes (PR #95401)

[Simon Pilgrim via llvm-commits]

https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/95401

The target must be responsible for any expansion that needs to be performed for extended types etc.

Fixes #95274

>From 3355258f701169c47282673f860372f0b305ec91 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Thu, 13 Jun 2024 13:29:03 +0100
Subject: [PATCH] [DAG] getOperationAction - always return Custom action for
 target opcodes

The target must be responsible for any expansion that needs to be performed for extended types etc.

Fixes #95274
---
 llvm/include/llvm/CodeGen/TargetLowering.h |  3 +-
 llvm/test/CodeGen/X86/pr95274.ll           | 47 ++++++++++++++++++++++
 2 files changed, 49 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/X86/pr95274.ll

diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 167e69afb548c..3074ece787a08 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -1255,11 +1255,12 @@ class TargetLoweringBase {
   /// be promoted to a larger size, needs to be expanded to some other code
   /// sequence, or the target has a custom expander for it.
   LegalizeAction getOperationAction(unsigned Op, EVT VT) const {
-    if (VT.isExtended()) return Expand;
     // If a target-specific SDNode requires legalization, require the target
     // to provide custom legalization for it.
     if (Op >= std::size(OpActions[0]))
       return Custom;
+    if (VT.isExtended())
+      return Expand;
     return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op];
   }
 
diff --git a/llvm/test/CodeGen/X86/pr95274.ll b/llvm/test/CodeGen/X86/pr95274.ll
new file mode 100644
index 0000000000000..bc43a47a28538
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr95274.ll
@@ -0,0 +1,47 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake-avx512 | FileCheck %s
+
+define void @PR95274(ptr %p0) nounwind {
+; CHECK-LABEL: PR95274:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vcvtps2ph $4, %zmm0, %ymm0
+; CHECK-NEXT:    vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; CHECK-NEXT:    vmovups %zmm0, 1984(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1920(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1856(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1792(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1728(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1664(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1600(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1536(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1472(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1408(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1344(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1280(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1216(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1152(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1088(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 1024(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 960(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 896(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 832(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 768(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 704(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 640(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 576(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 512(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 448(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 384(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 320(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 256(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 192(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 128(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, 64(%rdi)
+; CHECK-NEXT:    vmovups %zmm0, (%rdi)
+; CHECK-NEXT:    vzeroupper
+; CHECK-NEXT:    retq
+  %load = load <1024 x float>, ptr %p0, align 2
+  %trunc = fptrunc <1024 x float> poison to <1024 x half>
+  store <1024 x half> %trunc, ptr %p0, align 2
+  ret void
+}