[llvm] [SPIR-V] Lower llvm.x.with.overflow intrinsics (PR #95012)
Michal Paszkowski via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 12 13:43:22 PDT 2024
michalpaszkowski wrote:
This particular case (in case of llvm.x.with.overflow builtins) probably can be reworked in entirety using native SPIR-V instructions (coming in another patch as this requires further testing with our non-standard compliant SPIR-V consumer). Given that we have 1:1 mapping we won't need to do anything related to aggregates prior to IRTranslation for these builtins.
However, the majority of logic in SPIRVPrepareFunctions and SPIRVEmitIntrinsics related to handling aggregates is not so simple to be reworked -- if this is what you mean -- and I am not even entirely sure it is possible to handle some cases after IRTranslation without too much inefficiency and unnecessary complexity.
@efriedma-quic Could you please elaborate what do you consider exactly to be a blocker for exiting "experimental" status? Also, would you be available to join our [SPIR-V backend sync up meeting this upcoming Monday](https://llvm.org/docs/GettingInvolved.html#id15) to discuss this? Alternatively we could discuss this over email if this would work better. We would gladly take any tips on how we could rework our pre-IRTranslation passes. SPIR-V is really on similar level as LLVM IR and things that apply to other targets do not fit as easily here.
CC: @VyacheslavLevytskyy @iliya-diyachkov
https://github.com/llvm/llvm-project/pull/95012
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