[llvm] 1216cde - [X86][mem-fold] Support memory folding from MOV32r0 to MOV64mi32

[Shengchen Kan via llvm-commits]

Author: Shengchen Kan
Date: 2024-06-12T22:06:10+08:00
New Revision: 1216cde81afa263b972171116f8d3ca94c941107

URL: https://github.com/llvm/llvm-project/commit/1216cde81afa263b972171116f8d3ca94c941107
DIFF: https://github.com/llvm/llvm-project/commit/1216cde81afa263b972171116f8d3ca94c941107.diff

LOG: [X86][mem-fold] Support memory folding from MOV32r0 to MOV64mi32

Added: 
    llvm/test/CodeGen/X86/memfold-mov32r0.ll

Modified: 
    llvm/lib/Target/X86/X86InstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index ce1bbc8a959bf..66d0c09d08551 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -7202,7 +7202,7 @@ static MachineInstr *fuseInst(MachineFunction &MF, unsigned Opcode,
   return MIB;
 }
 
-static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode,
+static MachineInstr *makeM0Inst(const TargetInstrInfo &TII, unsigned Opcode,
                                 ArrayRef<MachineOperand> MOs,
                                 MachineBasicBlock::iterator InsertPt,
                                 MachineInstr &MI) {
@@ -7282,6 +7282,12 @@ MachineInstr *X86InstrInfo::foldMemoryOperandCustom(
       }
     }
     break;
+  case X86::MOV32r0:
+    if (auto *NewMI =
+            makeM0Inst(*this, (Size == 4) ? X86::MOV32mi : X86::MOV64mi32, MOs,
+                       InsertPt, MI))
+      return NewMI;
+    break;
   }
 
   return nullptr;
@@ -7382,10 +7388,6 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
                                                Size, Alignment))
     return CustomMI;
 
-  if (Opc == X86::MOV32r0)
-    if (auto *NewMI = MakeM0Inst(*this, X86::MOV32mi, MOs, InsertPt, MI))
-      return NewMI;
-
   // Folding a memory location into the two-address part of a two-address
   // instruction is 
diff erent than folding it other places.  It requires
   // replacing the *two* registers with the memory location.
@@ -7483,6 +7485,10 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
   for (auto Op : Ops) {
     MachineOperand &MO = MI.getOperand(Op);
     auto SubReg = MO.getSubReg();
+    // MOV32r0 is special b/c it's used to clear a 64-bit register too.
+    // (See patterns for MOV32r0 in TD files).
+    if (MI.getOpcode() == X86::MOV32r0 && SubReg == X86::sub_32bit)
+      continue;
     if (SubReg && (MO.isDef() || SubReg == X86::sub_8bit_hi))
       return nullptr;
   }

diff  --git a/llvm/test/CodeGen/X86/memfold-mov32r0.ll b/llvm/test/CodeGen/X86/memfold-mov32r0.ll
new file mode 100644
index 0000000000000..f7cbf6c33c94c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/memfold-mov32r0.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -mtriple=x86_64 | FileCheck %s
+
+; CHECK:    movq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
+define i32 @test() nounwind {
+entry:
+  %div = udiv i256 0, 0
+  store i256 %div, ptr null, align 16
+  ret i32 0
+}