[llvm] [AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (PR #95236)

[via llvm-commits]

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@@ -53,6 +53,8 @@
 using namespace llvm;
 using namespace AArch64GISelUtils;
 
+extern cl::opt<bool> EnableSVEGISel;
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Him188 wrote:

`AArch64CallLowering::fallBackToDAGISel` works on `MachineFunction` as an early path before IRTranslate. 
`AArch64TargetLowering::fallBackToDAGISel` works on each `Instruction`.

FastISel also uses `AArch64TargetLowering::fallBackToDAGISel`, making it more complex to merge the logic.

This patch does not completely support SVE formal arguments, especially for predicate registers <vscale x 16 x i1>. 
The option is needed until we support them.


https://github.com/llvm/llvm-project/pull/95236