[llvm] [RFC][MC] Cache MCRegAliasIterator (PR #93510)

Sergei Barannikov via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 12 04:46:01 PDT 2024


================
@@ -187,6 +187,9 @@ class MCRegisterInfo {
   DenseMap<MCRegister, int> L2SEHRegs;        // LLVM to SEH regs mapping
   DenseMap<MCRegister, int> L2CVRegs;         // LLVM to CV regs mapping
 
+  mutable DenseMap<MCPhysReg, std::vector<MCPhysReg>> RegAliasesCache;
----------------
s-barannikov wrote:

If I counted correctly, there will be 1'864'820 registers in all vectors in the map if every register is asked for its aliases. The number doesn't look like horribly large, so I guess caching is a reasonable trade-off.


https://github.com/llvm/llvm-project/pull/93510


More information about the llvm-commits mailing list