[llvm] [CodeGen][MachineLICM] Use RegUnits in HoistRegionPostRA (PR #94608)

[Jay Foad via llvm-commits]

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@@ -423,10 +423,47 @@ static bool InstructionStoresToFI(const MachineInstr *MI, int FI) {
   return false;
 }
 
+static void applyBitsNotInRegMaskToRegUnitsMask(const TargetRegisterInfo &TRI,
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jayfoad wrote:

`setBitsNotInMask` is trivial because there is a 1-to-1 mapping between the two BitVectors. You are trying to implement this while also expanding from Registers (each bit in the regmask) to RegUnits (potentially multiple bits in RUs). What you have implemented is to clear a bit in RUs if _any_ register that includes that regunit is not listed in regmask. I think instead you should clear the bit in RUs if _all_ registers that include that regunit are not listed in regmask.

https://github.com/llvm/llvm-project/pull/94608