[llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 11 08:39:45 PDT 2024
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@@ -819,9 +825,7 @@ class VOP3P_DPPe_Common<bits<7> op, VOPProfile P> : VOP3P_DPPe_Common_Base<op, P
class VOP_DPP_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[],
dag Ins = P.InsDPP, string asmOps = P.AsmDPP> :
- InstSI <P.OutsDPP, Ins, OpName#asmOps, pattern>,
- VOP <OpName>,
- SIMCInstr <OpName#"_dpp", SIEncodingFamily.NONE> {
+ VOP_Pseudo<OpName, "_dpp", P, P.OutsDPP, Ins, asmOps, pattern> {
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jayfoad wrote:
I see. I think this just allows you to use VOP_Pseudo as a common superclass for all VOP instructions, DPP or not, when you define the searchable table. Perhaps you could use an even more common class like InstSI - I'm not sure if that would make the generated table bigger.
@Sisyph @kosarev any thoughts on this part of the patch?
https://github.com/llvm/llvm-project/pull/91802
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