[llvm] 464eb64 - [X86] SimplifyDemandedBitsForTargetNode - add basic X86ISD::CMOV handling
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 11 07:18:06 PDT 2024
Author: Simon Pilgrim
Date: 2024-06-11T15:17:53+01:00
New Revision: 464eb648fa33c46f51f7c3d1f4ab3eef7ec12750
URL: https://github.com/llvm/llvm-project/commit/464eb648fa33c46f51f7c3d1f4ab3eef7ec12750
DIFF: https://github.com/llvm/llvm-project/commit/464eb648fa33c46f51f7c3d1f4ab3eef7ec12750.diff
LOG: [X86] SimplifyDemandedBitsForTargetNode - add basic X86ISD::CMOV handling
Add basic pass through handling - we could extend this to truncate CMOVQ to CMOVL in a future patch
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 2ed79385272fa..cad3ea4716db3 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -42793,6 +42793,19 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
SimplifyDemandedBits(Op1, SignMask, KnownSrc, TLO, Depth + 1,
AssumeSingleUse);
}
+ case X86ISD::CMOV: {
+ KnownBits Known2;
+ if (SimplifyDemandedBits(Op.getOperand(1), OriginalDemandedBits,
+ OriginalDemandedElts, Known2, TLO, Depth + 1))
+ return true;
+ if (SimplifyDemandedBits(Op.getOperand(0), OriginalDemandedBits,
+ OriginalDemandedElts, Known, TLO, Depth + 1))
+ return true;
+
+ // Only known if known in both the LHS and RHS.
+ Known = Known.intersectWith(Known2);
+ break;
+ }
case X86ISD::BEXTR:
case X86ISD::BEXTRI: {
SDValue Op0 = Op.getOperand(0);
diff --git a/llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll b/llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll
index 929671d674e5e..4a47e7613dfa6 100644
--- a/llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll
+++ b/llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll
@@ -543,10 +543,10 @@ define void @load_1byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst)
; X64-NO-BMI2-NO-SHLD-NEXT: movq %xmm0, %rdi
; X64-NO-BMI2-NO-SHLD-NEXT: movl %esi, %ecx
; X64-NO-BMI2-NO-SHLD-NEXT: shrq %cl, %rdi
+; X64-NO-BMI2-NO-SHLD-NEXT: leal (%rax,%rax), %r8d
; X64-NO-BMI2-NO-SHLD-NEXT: notb %cl
-; X64-NO-BMI2-NO-SHLD-NEXT: leaq (%rax,%rax), %r8
; X64-NO-BMI2-NO-SHLD-NEXT: shlq %cl, %r8
-; X64-NO-BMI2-NO-SHLD-NEXT: orq %rdi, %r8
+; X64-NO-BMI2-NO-SHLD-NEXT: orl %edi, %r8d
; X64-NO-BMI2-NO-SHLD-NEXT: movl %esi, %ecx
; X64-NO-BMI2-NO-SHLD-NEXT: shrq %cl, %rax
; X64-NO-BMI2-NO-SHLD-NEXT: testb $64, %sil
@@ -573,19 +573,19 @@ define void @load_1byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst)
; X64-HAVE-BMI2-NO-SHLD: # %bb.0:
; X64-HAVE-BMI2-NO-SHLD-NEXT: movdqu (%rdi), %xmm0
; X64-HAVE-BMI2-NO-SHLD-NEXT: shll $3, %esi
-; X64-HAVE-BMI2-NO-SHLD-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; X64-HAVE-BMI2-NO-SHLD-NEXT: movq %xmm1, %rax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: movq %xmm0, %rax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; X64-HAVE-BMI2-NO-SHLD-NEXT: movq %xmm0, %rcx
-; X64-HAVE-BMI2-NO-SHLD-NEXT: shrxq %rsi, %rcx, %rcx
; X64-HAVE-BMI2-NO-SHLD-NEXT: movl %esi, %edi
; X64-HAVE-BMI2-NO-SHLD-NEXT: notb %dil
-; X64-HAVE-BMI2-NO-SHLD-NEXT: leaq (%rax,%rax), %r8
+; X64-HAVE-BMI2-NO-SHLD-NEXT: leal (%rcx,%rcx), %r8d
; X64-HAVE-BMI2-NO-SHLD-NEXT: shlxq %rdi, %r8, %rdi
-; X64-HAVE-BMI2-NO-SHLD-NEXT: orq %rcx, %rdi
; X64-HAVE-BMI2-NO-SHLD-NEXT: shrxq %rsi, %rax, %rax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: orl %edi, %eax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: shrxq %rsi, %rcx, %rcx
; X64-HAVE-BMI2-NO-SHLD-NEXT: testb $64, %sil
-; X64-HAVE-BMI2-NO-SHLD-NEXT: cmoveq %rdi, %rax
-; X64-HAVE-BMI2-NO-SHLD-NEXT: movb %al, (%rdx)
+; X64-HAVE-BMI2-NO-SHLD-NEXT: cmoveq %rax, %rcx
+; X64-HAVE-BMI2-NO-SHLD-NEXT: movb %cl, (%rdx)
; X64-HAVE-BMI2-NO-SHLD-NEXT: retq
;
; X64-HAVE-BMI2-HAVE-SHLD-LABEL: load_1byte_chunk_of_16byte_alloca:
@@ -651,10 +651,10 @@ define void @load_2byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst)
; X64-NO-BMI2-NO-SHLD-NEXT: movq %xmm0, %rdi
; X64-NO-BMI2-NO-SHLD-NEXT: movl %esi, %ecx
; X64-NO-BMI2-NO-SHLD-NEXT: shrq %cl, %rdi
+; X64-NO-BMI2-NO-SHLD-NEXT: leal (%rax,%rax), %r8d
; X64-NO-BMI2-NO-SHLD-NEXT: notb %cl
-; X64-NO-BMI2-NO-SHLD-NEXT: leaq (%rax,%rax), %r8
; X64-NO-BMI2-NO-SHLD-NEXT: shlq %cl, %r8
-; X64-NO-BMI2-NO-SHLD-NEXT: orq %rdi, %r8
+; X64-NO-BMI2-NO-SHLD-NEXT: orl %edi, %r8d
; X64-NO-BMI2-NO-SHLD-NEXT: movl %esi, %ecx
; X64-NO-BMI2-NO-SHLD-NEXT: shrq %cl, %rax
; X64-NO-BMI2-NO-SHLD-NEXT: testb $64, %sil
@@ -681,19 +681,19 @@ define void @load_2byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst)
; X64-HAVE-BMI2-NO-SHLD: # %bb.0:
; X64-HAVE-BMI2-NO-SHLD-NEXT: movdqu (%rdi), %xmm0
; X64-HAVE-BMI2-NO-SHLD-NEXT: shll $3, %esi
-; X64-HAVE-BMI2-NO-SHLD-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; X64-HAVE-BMI2-NO-SHLD-NEXT: movq %xmm1, %rax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: movq %xmm0, %rax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; X64-HAVE-BMI2-NO-SHLD-NEXT: movq %xmm0, %rcx
-; X64-HAVE-BMI2-NO-SHLD-NEXT: shrxq %rsi, %rcx, %rcx
; X64-HAVE-BMI2-NO-SHLD-NEXT: movl %esi, %edi
; X64-HAVE-BMI2-NO-SHLD-NEXT: notb %dil
-; X64-HAVE-BMI2-NO-SHLD-NEXT: leaq (%rax,%rax), %r8
+; X64-HAVE-BMI2-NO-SHLD-NEXT: leal (%rcx,%rcx), %r8d
; X64-HAVE-BMI2-NO-SHLD-NEXT: shlxq %rdi, %r8, %rdi
-; X64-HAVE-BMI2-NO-SHLD-NEXT: orq %rcx, %rdi
; X64-HAVE-BMI2-NO-SHLD-NEXT: shrxq %rsi, %rax, %rax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: orl %edi, %eax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: shrxq %rsi, %rcx, %rcx
; X64-HAVE-BMI2-NO-SHLD-NEXT: testb $64, %sil
-; X64-HAVE-BMI2-NO-SHLD-NEXT: cmoveq %rdi, %rax
-; X64-HAVE-BMI2-NO-SHLD-NEXT: movw %ax, (%rdx)
+; X64-HAVE-BMI2-NO-SHLD-NEXT: cmoveq %rax, %rcx
+; X64-HAVE-BMI2-NO-SHLD-NEXT: movw %cx, (%rdx)
; X64-HAVE-BMI2-NO-SHLD-NEXT: retq
;
; X64-HAVE-BMI2-HAVE-SHLD-LABEL: load_2byte_chunk_of_16byte_alloca:
@@ -758,10 +758,10 @@ define void @load_4byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst)
; X64-NO-BMI2-NO-SHLD-NEXT: movq %xmm0, %rdi
; X64-NO-BMI2-NO-SHLD-NEXT: movl %esi, %ecx
; X64-NO-BMI2-NO-SHLD-NEXT: shrq %cl, %rdi
+; X64-NO-BMI2-NO-SHLD-NEXT: leal (%rax,%rax), %r8d
; X64-NO-BMI2-NO-SHLD-NEXT: notb %cl
-; X64-NO-BMI2-NO-SHLD-NEXT: leaq (%rax,%rax), %r8
; X64-NO-BMI2-NO-SHLD-NEXT: shlq %cl, %r8
-; X64-NO-BMI2-NO-SHLD-NEXT: orq %rdi, %r8
+; X64-NO-BMI2-NO-SHLD-NEXT: orl %edi, %r8d
; X64-NO-BMI2-NO-SHLD-NEXT: movl %esi, %ecx
; X64-NO-BMI2-NO-SHLD-NEXT: shrq %cl, %rax
; X64-NO-BMI2-NO-SHLD-NEXT: testb $64, %sil
@@ -788,19 +788,19 @@ define void @load_4byte_chunk_of_16byte_alloca(ptr %src, i64 %byteOff, ptr %dst)
; X64-HAVE-BMI2-NO-SHLD: # %bb.0:
; X64-HAVE-BMI2-NO-SHLD-NEXT: movdqu (%rdi), %xmm0
; X64-HAVE-BMI2-NO-SHLD-NEXT: shll $3, %esi
-; X64-HAVE-BMI2-NO-SHLD-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; X64-HAVE-BMI2-NO-SHLD-NEXT: movq %xmm1, %rax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: movq %xmm0, %rax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; X64-HAVE-BMI2-NO-SHLD-NEXT: movq %xmm0, %rcx
-; X64-HAVE-BMI2-NO-SHLD-NEXT: shrxq %rsi, %rcx, %rcx
; X64-HAVE-BMI2-NO-SHLD-NEXT: movl %esi, %edi
; X64-HAVE-BMI2-NO-SHLD-NEXT: notb %dil
-; X64-HAVE-BMI2-NO-SHLD-NEXT: leaq (%rax,%rax), %r8
+; X64-HAVE-BMI2-NO-SHLD-NEXT: leal (%rcx,%rcx), %r8d
; X64-HAVE-BMI2-NO-SHLD-NEXT: shlxq %rdi, %r8, %rdi
-; X64-HAVE-BMI2-NO-SHLD-NEXT: orq %rcx, %rdi
; X64-HAVE-BMI2-NO-SHLD-NEXT: shrxq %rsi, %rax, %rax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: orl %edi, %eax
+; X64-HAVE-BMI2-NO-SHLD-NEXT: shrxq %rsi, %rcx, %rcx
; X64-HAVE-BMI2-NO-SHLD-NEXT: testb $64, %sil
-; X64-HAVE-BMI2-NO-SHLD-NEXT: cmoveq %rdi, %rax
-; X64-HAVE-BMI2-NO-SHLD-NEXT: movl %eax, (%rdx)
+; X64-HAVE-BMI2-NO-SHLD-NEXT: cmoveq %rax, %rcx
+; X64-HAVE-BMI2-NO-SHLD-NEXT: movl %ecx, (%rdx)
; X64-HAVE-BMI2-NO-SHLD-NEXT: retq
;
; X64-HAVE-BMI2-HAVE-SHLD-LABEL: load_4byte_chunk_of_16byte_alloca:
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