[llvm] [CodeGen][MachineLICM] Use RegUnits in HoistRegionPostRA (PR #94608)

[Pierre van Houtryve via llvm-commits]

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@@ -423,10 +423,47 @@ static bool InstructionStoresToFI(const MachineInstr *MI, int FI) {
   return false;
 }
 
+static void applyBitsNotInRegMaskToRegUnitsMask(const TargetRegisterInfo *TRI,
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Pierre-vh wrote:

This is a bit longer than just creating a BitVector but it avoids a dynamic allocation which I think is worth it.
Otherwise we instantiate a BitVector pretty much on each instruction.

https://github.com/llvm/llvm-project/pull/94608