[llvm] c63a622 - [AArch64] Disable red-zone when lowering Q-reg copy through memory. (#94962)
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Tue Jun 11 00:58:32 PDT 2024
Author: Sander de Smalen
Date: 2024-06-11T08:58:28+01:00
New Revision: c63a622ba7547812939e2fd3dbfbe50e6cda2a42
URL: https://github.com/llvm/llvm-project/commit/c63a622ba7547812939e2fd3dbfbe50e6cda2a42
DIFF: https://github.com/llvm/llvm-project/commit/c63a622ba7547812939e2fd3dbfbe50e6cda2a42.diff
LOG: [AArch64] Disable red-zone when lowering Q-reg copy through memory. (#94962)
This was pointed out in PR #93940.
Added:
Modified:
llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/test/CodeGen/AArch64/arm64-redzone.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index cd532671f5018..cf617c7e92a70 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -431,8 +431,16 @@ bool AArch64FrameLowering::canUseRedZone(const MachineFunction &MF) const {
const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
uint64_t NumBytes = AFI->getLocalStackSize();
+ // If neither NEON or SVE are available, a COPY from one Q-reg to
+ // another requires a spill -> reload sequence. We can do that
+ // using a pre-decrementing store/post-decrementing load, but
+ // if we do so, we can't use the Red Zone.
+ bool LowerQRegCopyThroughMem = Subtarget.hasFPARMv8() &&
+ !Subtarget.isNeonAvailable() &&
+ !Subtarget.hasSVE();
+
return !(MFI.hasCalls() || hasFP(MF) || NumBytes > RedZoneSize ||
- getSVEStackSize(MF));
+ getSVEStackSize(MF) || LowerQRegCopyThroughMem);
}
/// hasFP - Return true if the specified function should have a dedicated frame
diff --git a/llvm/test/CodeGen/AArch64/arm64-redzone.ll b/llvm/test/CodeGen/AArch64/arm64-redzone.ll
index fe30a1a98521e..d001bc2a8dbe4 100644
--- a/llvm/test/CodeGen/AArch64/arm64-redzone.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-redzone.ll
@@ -16,3 +16,16 @@ define i32 @foo(i32 %a, i32 %b) nounwind ssp {
%tmp2 = load i32, ptr %x, align 4
ret i32 %tmp2
}
+
+; We disable red-zone if NEON is available because copies of Q-regs
+; require a spill/fill and dynamic allocation. But we only need to do
+; this when FP registers are enabled.
+define void @bar(fp128 %f) "target-features"="-fp-armv8" {
+; CHECK-LABEL: bar:
+; CHECK: // %bb.0:
+; CHECK-NEXT: stp x0, x1, [sp, #-16]
+; CHECK-NEXT: ret
+ %ptr = alloca fp128
+ store fp128 %f, ptr %ptr
+ ret void
+}
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