[llvm] [NFCI][AMDGPU] Try to use PressureDiff to Calculate RegPressure. (PR #94221)

[Pierre van Houtryve via llvm-commits]

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@@ -116,31 +116,86 @@ void GCNSchedStrategy::initialize(ScheduleDAGMI *DAG) {
                     << ", SGPRExcessLimit = " << SGPRExcessLimit << "\n\n");
 }
 
+static bool canUsePressureDiffs(SUnit *SU) {
+  if (SU->isInstr()) {
+    // Cannot use pressure diffs for subregister defs or with physregs, it's
+    // imprecise in both cases.
+    for (const auto &Op : SU->getInstr()->operands()) {
+      if (!Op.isReg() || Op.isImplicit())
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Pierre-vh wrote:

We often have virtual regs with implicit physreg operands, like implicit exec.
Implicit operands liveness, for some reason, cause no problems as far as I can see.
I ran the expensive check below on:

- A large full LTO module (120MB of bitcode)
- Internal CI
- Lit tests

And ignoring implicit operands works fine. If we didn't ignore them we'd probably end up using the expensive path much more often

https://github.com/llvm/llvm-project/pull/94221