[llvm] [CodeGen] Use temp symbol for MBBs (PR #95031)

[via llvm-commits]

https://github.com/aengelke created https://github.com/llvm/llvm-project/pull/95031

Internal label names never occur in the symbol table, so when using an object streamer, there's no point in constructing these names and then adding them to hash tables -- they are never visible in the output.

This changes label names to use the PrivateGlobalPrefix instead of the PrivateLabelPrefix. These are the same for all targets, however, so this seems acceptable.

---

Draft, because I only tested x86 and AArch64 so far.

>From 1fc37040f0ae4d884529af458020a4bc96c8b7b8 Mon Sep 17 00:00:00 2001
From: Alexis Engelke <engelke at in.tum.de>
Date: Mon, 10 Jun 2024 20:29:09 +0200
Subject: [PATCH] [CodeGen] Use temp symbol for MBBs

Internal label names never occur in the symbol table, so when using an
object streamer, there's no point in constructing these names and then
adding them to hash tables -- they are never visible in the output.

This changes label names to use the PrivateGlobalPrefix instead of the
PrivateLabelPrefix. These are the same for all targets, however, so this
seems acceptable.
---
 llvm/lib/CodeGen/MachineBasicBlock.cpp          | 17 ++++++++++++-----
 .../AArch64/branch-relax-cross-section.mir      |  4 ++--
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 0bd5f09564ec0..4a5f11c9b9dab 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -79,11 +79,18 @@ MCSymbol *MachineBasicBlock::getSymbol() const {
         Suffix = (Suffix + Twine(".__part.") + Twine(SectionID.Number)).str();
       }
       CachedMCSymbol = Ctx.getOrCreateSymbol(MF->getName() + Suffix);
-    } else {
+    } else if (hasLabelMustBeEmitted()) {
+      // If the block occurs as label in inline assembly, parsing the assembly
+      // needs an actual label name.
       const StringRef Prefix = Ctx.getAsmInfo()->getPrivateLabelPrefix();
       CachedMCSymbol = Ctx.getOrCreateSymbol(Twine(Prefix) + "BB" +
                                              Twine(MF->getFunctionNumber()) +
                                              "_" + Twine(getNumber()));
+    } else {
+      CachedMCSymbol = Ctx.createTempSymbol("BB" +
+                                            Twine(MF->getFunctionNumber()) +
+                                            "_" + Twine(getNumber()),
+                                            /*AlwaysAddSuffix=*/false);
     }
   }
   return CachedMCSymbol;
@@ -104,10 +111,10 @@ MCSymbol *MachineBasicBlock::getEndSymbol() const {
   if (!CachedEndMCSymbol) {
     const MachineFunction *MF = getParent();
     MCContext &Ctx = MF->getContext();
-    auto Prefix = Ctx.getAsmInfo()->getPrivateLabelPrefix();
-    CachedEndMCSymbol = Ctx.getOrCreateSymbol(Twine(Prefix) + "BB_END" +
-                                              Twine(MF->getFunctionNumber()) +
-                                              "_" + Twine(getNumber()));
+    CachedEndMCSymbol = Ctx.createTempSymbol("BB_END" +
+                                             Twine(MF->getFunctionNumber()) +
+                                             "_" + Twine(getNumber()),
+                                             /*AlwaysAddSuffix=*/false);
   }
   return CachedEndMCSymbol;
 }
diff --git a/llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir b/llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
index f8f0b76f1c9ff..db88bf0044a5f 100644
--- a/llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
+++ b/llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
@@ -473,8 +473,8 @@ body:             |
   ; INDIRECT-NEXT:    successors: %bb.1
   ; INDIRECT-NEXT:    liveins: $x16
   ; INDIRECT-NEXT:    {{ $}}
-  ; INDIRECT-NEXT:    $[[SCAVENGED_REGISTER:x[0-9]+]] = ADRP target-flags(aarch64-page) <mcsymbol .LBB5_1>
-  ; INDIRECT-NEXT:    $[[SCAVENGED_REGISTER]] = ADDXri $[[SCAVENGED_REGISTER]], target-flags(aarch64-pageoff, aarch64-nc) <mcsymbol .LBB5_1>, 0
+  ; INDIRECT-NEXT:    $[[SCAVENGED_REGISTER:x[0-9]+]] = ADRP target-flags(aarch64-page) <mcsymbol >
+  ; INDIRECT-NEXT:    $[[SCAVENGED_REGISTER]] = ADDXri $[[SCAVENGED_REGISTER]], target-flags(aarch64-pageoff, aarch64-nc) <mcsymbol >, 0
   ; INDIRECT-NEXT:    BR $[[SCAVENGED_REGISTER]]
 
   bb.0.entry: