[llvm] [GISel][RISCV] Anyextend before copying f16 -> i32/i64 (PR #94993)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 10 07:58:23 PDT 2024


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@@ -102,9 +102,16 @@ struct RISCVOutgoingValueHandler : public CallLowering::OutgoingValueHandler {
 
   void assignValueToReg(Register ValVReg, Register PhysReg,
                         const CCValAssign &VA) override {
-    // If we're passing an f32 value into an i64, anyextend before copying.
-    if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32)
-      ValVReg = MIRBuilder.buildAnyExt(LLT::scalar(64), ValVReg).getReg(0);
+    // If we're passing a smaller fp value into a larger integer register,
+    // anyextend before copying.
+    if ((VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) ||
+        ((VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::i64) &&
+         VA.getValVT() == MVT::f16))
+      ValVReg =
+          MIRBuilder
+              .buildAnyExt(LLT::scalar(VA.getLocVT().getScalarSizeInBits()),
+                           ValVReg)
+              .getReg(0);
----------------
arsenm wrote:

Use some temporary variables and braces? This wrapping is horrible 

https://github.com/llvm/llvm-project/pull/94993


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