[llvm] [AMDGPU][WIP] Optimize SGPR spills (PR #93668)
Vikash Gupta via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 10 03:39:31 PDT 2024
================
@@ -362,10 +362,12 @@
; GCN-O1-NEXT: Machine Optimization Remark Emitter
; GCN-O1-NEXT: Greedy Register Allocator
; GCN-O1-NEXT: Virtual Register Rewriter
+; GCN-O1-NEXT: Stack Slot Coloring
; GCN-O1-NEXT: SI lower SGPR spill instructions
; GCN-O1-NEXT: Virtual Register Map
; GCN-O1-NEXT: Live Register Matrix
; GCN-O1-NEXT: SI Pre-allocate WWM Registers
+; GCN-O1-NEXT: Live Stack Slot Analysis
----------------
vg0204 wrote:
@arsenm, after spending some time & tinkering around, I figured it out! Let me know so the Stack Slot Coloring should preserve LiveStack analysis?
https://github.com/llvm/llvm-project/pull/93668
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