[llvm] 41f2ea0 - [SPARC][IAS] Add support for `prefetcha` instruction

via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 9 08:13:34 PDT 2024


Author: Koakuma
Date: 2024-06-09T22:13:31+07:00
New Revision: 41f2ea0b0fcd2b683c7380e1cfd3acad2feb51dd

URL: https://github.com/llvm/llvm-project/commit/41f2ea0b0fcd2b683c7380e1cfd3acad2feb51dd
DIFF: https://github.com/llvm/llvm-project/commit/41f2ea0b0fcd2b683c7380e1cfd3acad2feb51dd.diff

LOG: [SPARC][IAS] Add support for `prefetcha` instruction

This adds support for `prefetcha` instruction for prefetching from
alternate address spaces.

Reviewers: jrtc27, brad0, rorth, s-barannikov

Reviewed By: s-barannikov

Pull Request: https://github.com/llvm/llvm-project/pull/94250

Added: 
    

Modified: 
    llvm/lib/Target/Sparc/SparcInstrInfo.td
    llvm/test/MC/Disassembler/Sparc/sparc-v9-asi.txt
    llvm/test/MC/Sparc/sparcv9-instructions.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td b/llvm/lib/Target/Sparc/SparcInstrInfo.td
index f1778f2162f8c..cac96a1398721 100644
--- a/llvm/lib/Target/Sparc/SparcInstrInfo.td
+++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td
@@ -1782,6 +1782,13 @@ let Predicates = [HasV9] in {
   def PREFETCHi : F3_2<3, 0b101101,
                    (outs), (ins (MEMri $rs1, $simm13):$addr, PrefetchTag:$rd),
                    "prefetch [$addr], $rd", []>;
+  def PREFETCHAr : F3_1_asi<3, 0b111101, (outs),
+                    (ins (MEMrr $rs1, $rs2):$addr, ASITag:$asi, PrefetchTag:$rd),
+                    "prefetcha [$addr] $asi, $rd", []>;
+  let Uses = [ASR3] in
+  def PREFETCHAi : F3_2<3, 0b111101, (outs),
+                    (ins (MEMri $rs1, $simm13):$addr, PrefetchTag:$rd),
+                    "prefetcha [$addr] %asi, $rd", []>;
 }
 
 

diff  --git a/llvm/test/MC/Disassembler/Sparc/sparc-v9-asi.txt b/llvm/test/MC/Disassembler/Sparc/sparc-v9-asi.txt
index 9286814552cf5..1d1fdb667fafa 100644
--- a/llvm/test/MC/Disassembler/Sparc/sparc-v9-asi.txt
+++ b/llvm/test/MC/Disassembler/Sparc/sparc-v9-asi.txt
@@ -32,3 +32,8 @@
 0xd5 0xf6 0x11 0x56
 # V9: casxa [%i0] #ASI_SNF_L, %l6, %o2
 0xd5 0xf6 0x11 0x76
+
+# V9: prefetcha  [%i1+3968] %asi, #one_read
+0xc3 0xee 0x6f 0x80
+# V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read
+0xc3 0xee 0x50 0x7a

diff  --git a/llvm/test/MC/Sparc/sparcv9-instructions.s b/llvm/test/MC/Sparc/sparcv9-instructions.s
index 80f67ac30bc82..1b11171b7074d 100644
--- a/llvm/test/MC/Sparc/sparcv9-instructions.s
+++ b/llvm/test/MC/Sparc/sparcv9-instructions.s
@@ -647,6 +647,36 @@
         ! V9: prefetch  [%i1+%i2], #one_write_strong  ! encoding: [0xef,0x6e,0x40,0x1a]
         prefetch  [ %i1 + %i2 ], #one_write_strong
 
+        ! V8:      error: malformed ASI tag, must be a constant integer expression
+        ! V8-NEXT: prefetcha  [ %i1 + 0xf80 ] %asi, 1
+        ! V9: prefetcha [%i1+3968] %asi, #one_read    ! encoding: [0xc3,0xee,0x6f,0x80]
+        prefetcha  [ %i1 + 0xf80 ] %asi, 1
+
+        ! V8:      error: malformed ASI tag, must be a constant integer expression
+        ! V8-NEXT: prefetcha  [ %i1 + 0xf80 ] %asi, #one_read
+        ! V9: prefetcha [%i1+3968] %asi, #one_read    ! encoding: [0xc3,0xee,0x6f,0x80]
+        prefetcha  [ %i1 + 0xf80 ] %asi, #one_read
+
+        ! V8:      error: malformed ASI tag, must be a constant integer expression
+        ! V8-NEXT: prefetcha  [ %i1 + %i2 ] #ASI_SNF, 1
+        ! V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read ! encoding: [0xc3,0xee,0x50,0x7a]
+        prefetcha  [ %i1 + %i2 ] #ASI_SNF, 1
+
+        ! V8:      error: malformed ASI tag, must be a constant integer expression
+        ! V8-NEXT: prefetcha  [ %i1 + %i2 ] #ASI_SNF, #one_read
+        ! V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read ! encoding: [0xc3,0xee,0x50,0x7a]
+        prefetcha  [ %i1 + %i2 ] #ASI_SNF, #one_read
+
+        ! V8:      error: invalid operand for instruction
+        ! V8-NEXT: prefetcha  [ %i1 + %i2 ] 131, 1
+        ! V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read ! encoding: [0xc3,0xee,0x50,0x7a]
+        prefetcha  [ %i1 + %i2 ] 131, 1
+
+        ! V8:      error: unexpected token
+        ! V8-NEXT: prefetcha  [ %i1 + %i2 ] 131, #one_read
+        ! V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read ! encoding: [0xc3,0xee,0x50,0x7a]
+        prefetcha  [ %i1 + %i2 ] 131, #one_read
+
         ! V8:      error: instruction requires a CPU feature not currently enabled
         ! V8-NEXT: done
         ! V9: done      ! encoding: [0x81,0xf0,0x00,0x00]


        


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