[llvm] 715a5d8 - [SPARC][IAS] Add aliases for %asr20-21 as defined in JPS1

via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 8 20:14:53 PDT 2024


Author: Koakuma
Date: 2024-06-09T10:14:50+07:00
New Revision: 715a5d8d93a8383e50e9400303313288c0e5b0de

URL: https://github.com/llvm/llvm-project/commit/715a5d8d93a8383e50e9400303313288c0e5b0de
DIFF: https://github.com/llvm/llvm-project/commit/715a5d8d93a8383e50e9400303313288c0e5b0de.diff

LOG: [SPARC][IAS] Add aliases for %asr20-21 as defined in JPS1

This adds %set_softint and %clear_softint alias for %asr20 and %asr21
as defined in JPS1.

Reviewers: jrtc27, brad0, s-barannikov, rorth

Reviewed By: s-barannikov

Pull Request: https://github.com/llvm/llvm-project/pull/94247

Added: 
    

Modified: 
    llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
    llvm/test/MC/Sparc/sparcv9-instructions.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index 185b2fe90c6cb..e4f5c64f9d00e 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -1384,12 +1384,11 @@ MCRegister SparcAsmParser::matchRegisterName(const AsmToken &Tok,
   }
 
   // JPS1 extension - aliases for ASRs
-  // Section A.51 - Read State Register
+  // Section 5.2.11 - Ancillary State Registers (ASRs)
   if (Name == "pcr") {
     RegKind = SparcOperand::rk_Special;
     return SP::ASR16;
   }
-
   if (Name == "pic") {
     RegKind = SparcOperand::rk_Special;
     return SP::ASR17;
@@ -1402,6 +1401,14 @@ MCRegister SparcAsmParser::matchRegisterName(const AsmToken &Tok,
     RegKind = SparcOperand::rk_Special;
     return SP::ASR19;
   }
+  if (Name == "set_softint") {
+    RegKind = SparcOperand::rk_Special;
+    return SP::ASR20;
+  }
+  if (Name == "clear_softint") {
+    RegKind = SparcOperand::rk_Special;
+    return SP::ASR21;
+  }
   if (Name == "softint") {
     RegKind = SparcOperand::rk_Special;
     return SP::ASR22;

diff  --git a/llvm/test/MC/Sparc/sparcv9-instructions.s b/llvm/test/MC/Sparc/sparcv9-instructions.s
index b947243f8258f..d461c82467471 100644
--- a/llvm/test/MC/Sparc/sparcv9-instructions.s
+++ b/llvm/test/MC/Sparc/sparcv9-instructions.s
@@ -502,6 +502,10 @@
         wr %i0, %i1, %ccr
         ! V9: wr %i0, 1, %ccr           ! encoding: [0x85,0x86,0x20,0x01]
         wr %i0, 1, %ccr
+        ! V9: wr %i0, 1, %asr20         ! encoding: [0xa9,0x86,0x20,0x01]
+        wr %i0, 1, %set_softint
+        ! V9: wr %i0, 1, %asr21         ! encoding: [0xab,0x86,0x20,0x01]
+        wr %i0, 1, %clear_softint
 
         ! V9: st %o1, [%o0]             ! encoding: [0xd2,0x22,0x00,0x00]
         stw %o1, [%o0]


        


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