[llvm] [SPARC][IAS] Add support for %uhi and %ulo extensions (PR #94246)
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Sat Jun 8 20:09:55 PDT 2024
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/94246
>From 04bfa20fbeba63f405d12f49a5a75c0903b252b8 Mon Sep 17 00:00:00 2001
From: Koakuma <koachan at protonmail.com>
Date: Mon, 3 Jun 2024 23:28:19 +0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20change?=
=?UTF-8?q?s=20to=20main=20this=20commit=20is=20based=20on?=
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Created using spr 1.3.4
[skip ci]
---
llvm/lib/Target/Sparc/SparcInstrAliases.td | 11 ++++++++---
llvm/test/MC/Sparc/sparcv9-instructions.s | 10 ++++++++++
2 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/Sparc/SparcInstrAliases.td b/llvm/lib/Target/Sparc/SparcInstrAliases.td
index db4c05cf18062..2b9244519f154 100644
--- a/llvm/lib/Target/Sparc/SparcInstrAliases.td
+++ b/llvm/lib/Target/Sparc/SparcInstrAliases.td
@@ -560,11 +560,16 @@ def : InstAlias<"mov $simm13, %tbr", (WRTBRri G0, simm13Op:$simm13), 0>;
// End of Section A.3
-// or imm, reg, rd -> or reg, imm, rd
-// Nonstandard GNU extension.
-let EmitPriority = 0 in
+
+// Nonstandard GNU extensions.
+let EmitPriority = 0 in {
+ // or imm, reg, rd -> or reg, imm, rd
def : InstAlias<"or $simm13, $rs1, $rd", (ORri IntRegs:$rd, IntRegs:$rs1, simm13Op:$simm13)>;
+ // addc/addx imm, reg, rd -> or reg, imm, rd
+ def : InstAlias<"addx $simm13, $rs1, $rd", (ADDCri IntRegs:$rd, IntRegs:$rs1, simm13Op:$simm13)>;
+}
+
// wr reg_or_imm, specialreg -> wr %g0, reg_or_imm, specialreg
// (aka: omit the first arg when it's g0. This is not in the manual, but is
// supported by gnu and solaris as)
diff --git a/llvm/test/MC/Sparc/sparcv9-instructions.s b/llvm/test/MC/Sparc/sparcv9-instructions.s
index 0ca2e50989ca9..b947243f8258f 100644
--- a/llvm/test/MC/Sparc/sparcv9-instructions.s
+++ b/llvm/test/MC/Sparc/sparcv9-instructions.s
@@ -6,6 +6,16 @@
! V9: addx %g2, %g1, %g3 ! encoding: [0x86,0x40,0x80,0x01]
addc %g2, %g1, %g3
+ ! V8: error: invalid instruction mnemonic
+ ! V8-NEXT: addc %g2, 1, %g3
+ ! V9: addx %g2, 1, %g3 ! encoding: [0x86,0x40,0xa0,0x01]
+ addc %g2, 1, %g3
+
+ ! V8: error: invalid instruction mnemonic
+ ! V8-NEXT: addc 1, %g2, %g3
+ ! V9: addx %g2, 1, %g3 ! encoding: [0x86,0x40,0xa0,0x01]
+ addc 1, %g2, %g3
+
! V8: error: invalid instruction mnemonic
! V8-NEXT: addccc %g1, %g2, %g3
! V9: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02]
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