[llvm] 2900d03 - [InstCombine] Propagate flags when folding consecutative shifts

[Noah Goldstein via llvm-commits]

Author: Noah Goldstein
Date: 2024-06-08T16:46:45-05:00
New Revision: 2900d035f45fa04078ce9b1ec1e980b113f16013

URL: https://github.com/llvm/llvm-project/commit/2900d035f45fa04078ce9b1ec1e980b113f16013
DIFF: https://github.com/llvm/llvm-project/commit/2900d035f45fa04078ce9b1ec1e980b113f16013.diff

LOG: [InstCombine] Propagate flags when folding consecutative shifts

When we fold `(shift (shift C0, x), C1)` we can propagate flags that
are common to both shifts.

Proofs: https://alive2.llvm.org/ce/z/LkEzXD

Closes #94872

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
    llvm/test/Transforms/InstCombine/shift.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index 9ff817da79368..4a014ab6e044e 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -767,11 +767,20 @@ Instruction *InstCombinerImpl::FoldShiftByConstant(Value *Op0, Constant *C1,
   // (C2 >> X) >> C1 --> (C2 >> C1) >> X
   Constant *C2;
   Value *X;
-  if (match(Op0, m_BinOp(I.getOpcode(), m_ImmConstant(C2), m_Value(X))))
-    return BinaryOperator::Create(
+  bool IsLeftShift = I.getOpcode() == Instruction::Shl;
+  if (match(Op0, m_BinOp(I.getOpcode(), m_ImmConstant(C2), m_Value(X)))) {
+    Instruction *R = BinaryOperator::Create(
         I.getOpcode(), Builder.CreateBinOp(I.getOpcode(), C2, C1), X);
+    BinaryOperator *BO0 = cast<BinaryOperator>(Op0);
+    if (IsLeftShift) {
+      R->setHasNoUnsignedWrap(I.hasNoUnsignedWrap() &&
+                              BO0->hasNoUnsignedWrap());
+      R->setHasNoSignedWrap(I.hasNoSignedWrap() && BO0->hasNoSignedWrap());
+    } else
+      R->setIsExact(I.isExact() && BO0->isExact());
+    return R;
+  }
 
-  bool IsLeftShift = I.getOpcode() == Instruction::Shl;
   Type *Ty = I.getType();
   unsigned TypeBits = Ty->getScalarSizeInBits();
 

diff  --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll
index 87267471fcb26..0700d7a62ee15 100644
--- a/llvm/test/Transforms/InstCombine/shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift.ll
@@ -2242,7 +2242,7 @@ define i129 @shift_zext_not_nneg(i8 %arg) {
 
 define i8 @src_shl_nsw(i8 %x) {
 ; CHECK-LABEL: @src_shl_nsw(
-; CHECK-NEXT:    [[R:%.*]] = shl i8 32, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = shl nsw i8 32, [[X:%.*]]
 ; CHECK-NEXT:    ret i8 [[R]]
 ;
   %sh = shl nsw i8 1, %x
@@ -2262,7 +2262,7 @@ define i8 @src_shl_nsw_fail(i8 %x) {
 
 define i8 @src_shl_nuw(i8 %x) {
 ; CHECK-LABEL: @src_shl_nuw(
-; CHECK-NEXT:    [[R:%.*]] = shl i8 12, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = shl nuw i8 12, [[X:%.*]]
 ; CHECK-NEXT:    ret i8 [[R]]
 ;
   %sh = shl nuw i8 3, %x
@@ -2282,7 +2282,7 @@ define i8 @src_shl_nuw_fail(i8 %x) {
 
 define i8 @src_lshr_exact(i8 %x) {
 ; CHECK-LABEL: @src_lshr_exact(
-; CHECK-NEXT:    [[R:%.*]] = lshr i8 48, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = lshr exact i8 48, [[X:%.*]]
 ; CHECK-NEXT:    ret i8 [[R]]
 ;
   %sh = lshr exact i8 96, %x
@@ -2302,7 +2302,7 @@ define i8 @src_lshr_exact_fail(i8 %x) {
 
 define i8 @src_ashr_exact(i8 %x) {
 ; CHECK-LABEL: @src_ashr_exact(
-; CHECK-NEXT:    [[R:%.*]] = ashr i8 -8, [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = ashr exact i8 -8, [[X:%.*]]
 ; CHECK-NEXT:    ret i8 [[R]]
 ;
   %sh = ashr exact i8 -32, %x