[llvm] 3453ded - [PowerPC] return correct frame address for frameaddress intrinsic
Chen Zheng via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 7 02:17:35 PDT 2024
Author: Chen Zheng
Date: 2024-06-07T05:17:22-04:00
New Revision: 3453dedfaf565429bc06c6d58533926f793ad650
URL: https://github.com/llvm/llvm-project/commit/3453dedfaf565429bc06c6d58533926f793ad650
DIFF: https://github.com/llvm/llvm-project/commit/3453dedfaf565429bc06c6d58533926f793ad650.diff
LOG: [PowerPC] return correct frame address for frameaddress intrinsic
Added:
Modified:
llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
llvm/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
llvm/test/CodeGen/PowerPC/frameaddr.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
index 8444266459c43..201b2d162372b 100644
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -317,7 +317,8 @@ PPCFrameLowering::determineFrameLayout(const MachineFunction &MF,
!MFI.adjustsStack() && // No calls.
!MustSaveLR(MF, LR) && // No need to save LR.
!FI->mustSaveTOC() && // No need to save TOC.
- !RegInfo->hasBasePointer(MF); // No special alignment.
+ !RegInfo->hasBasePointer(MF) && // No special alignment.
+ !MFI.isFrameAddressTaken();
// Note: for PPC32 SVR4ABI, we can still generate stackless
// code if all local vars are reg-allocated.
diff --git a/llvm/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll b/llvm/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
index e4deef157be81..87565df1506b9 100644
--- a/llvm/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
+++ b/llvm/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
@@ -7,7 +7,9 @@ declare ptr @llvm.frameaddress(i32) nounwind readnone
define ptr @g2() nounwind readnone {
; CHECK-LABEL: g2:
; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: stwu 1, -16(1)
; CHECK-NEXT: lwz 3, 0(1)
+; CHECK-NEXT: addi 1, 1, 16
; CHECK-NEXT: blr
entry:
%0 = tail call ptr @llvm.frameaddress(i32 1) ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/PowerPC/frameaddr.ll b/llvm/test/CodeGen/PowerPC/frameaddr.ll
index ade38ea457a39..180f736c5ddbd 100644
--- a/llvm/test/CodeGen/PowerPC/frameaddr.ll
+++ b/llvm/test/CodeGen/PowerPC/frameaddr.ll
@@ -6,17 +6,23 @@
define ptr @main() #0 {
; AIX32-LABEL: main:
; AIX32: # %bb.0: # %entry
+; AIX32-NEXT: stwu 1, -32(1)
; AIX32-NEXT: mr 3, 1
+; AIX32-NEXT: addi 1, 1, 32
; AIX32-NEXT: blr
;
; AIX64-LABEL: main:
; AIX64: # %bb.0: # %entry
+; AIX64-NEXT: stdu 1, -48(1)
; AIX64-NEXT: mr 3, 1
+; AIX64-NEXT: addi 1, 1, 48
; AIX64-NEXT: blr
;
; LE-LABEL: main:
; LE: # %bb.0: # %entry
+; LE-NEXT: stdu 1, -32(1)
; LE-NEXT: mr 3, 1
+; LE-NEXT: addi 1, 1, 32
; LE-NEXT: blr
entry:
%0 = call ptr @llvm.frameaddress(i32 0)
@@ -46,17 +52,23 @@ entry:
define ptr @foo1() #0 {
; AIX32-LABEL: foo1:
; AIX32: # %bb.0: # %entry
+; AIX32-NEXT: stwu 1, -32(1)
; AIX32-NEXT: lwz 3, 0(1)
+; AIX32-NEXT: addi 1, 1, 32
; AIX32-NEXT: blr
;
; AIX64-LABEL: foo1:
; AIX64: # %bb.0: # %entry
+; AIX64-NEXT: stdu 1, -48(1)
; AIX64-NEXT: ld 3, 0(1)
+; AIX64-NEXT: addi 1, 1, 48
; AIX64-NEXT: blr
;
; LE-LABEL: foo1:
; LE: # %bb.0: # %entry
+; LE-NEXT: stdu 1, -32(1)
; LE-NEXT: ld 3, 0(1)
+; LE-NEXT: addi 1, 1, 32
; LE-NEXT: blr
entry:
%0 = call ptr @llvm.frameaddress(i32 1)
@@ -66,20 +78,26 @@ entry:
define ptr @foo2() #0 {
; AIX32-LABEL: foo2:
; AIX32: # %bb.0: # %entry
+; AIX32-NEXT: stwu 1, -32(1)
; AIX32-NEXT: lwz 3, 0(1)
; AIX32-NEXT: lwz 3, 0(3)
+; AIX32-NEXT: addi 1, 1, 32
; AIX32-NEXT: blr
;
; AIX64-LABEL: foo2:
; AIX64: # %bb.0: # %entry
+; AIX64-NEXT: stdu 1, -48(1)
; AIX64-NEXT: ld 3, 0(1)
; AIX64-NEXT: ld 3, 0(3)
+; AIX64-NEXT: addi 1, 1, 48
; AIX64-NEXT: blr
;
; LE-LABEL: foo2:
; LE: # %bb.0: # %entry
+; LE-NEXT: stdu 1, -32(1)
; LE-NEXT: ld 3, 0(1)
; LE-NEXT: ld 3, 0(3)
+; LE-NEXT: addi 1, 1, 32
; LE-NEXT: blr
entry:
%0 = call ptr @llvm.frameaddress(i32 2)
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