[llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 7 01:26:51 PDT 2024
================
@@ -7502,6 +7504,48 @@ LegalizerHelper::lowerShuffleVector(MachineInstr &MI) {
return Legalized;
}
+LegalizerHelper::LegalizeResult
+LegalizerHelper::lowerMASKED_COMPRESS(llvm::MachineInstr &MI) {
+ auto [Dst, DstTy, Vec, VecTy, Mask, MaskTy] = MI.getFirst3RegLLTs();
+
+ MachinePointerInfo PtrInfo;
+ Register StackPtr =
+ createStackTemporary(TypeSize::getFixed(VecTy.getSizeInBytes()),
+ getStackTemporaryAlignment(VecTy), PtrInfo)
+ .getReg(0);
+
+ LLT IdxTy = LLT::scalar(32);
+ LLT ValTy = VecTy.getElementType();
+ Align ValAlign = getStackTemporaryAlignment(ValTy);
+
+ Register OutPos = MIRBuilder.buildConstant(IdxTy, 0).getReg(0);
----------------
arsenm wrote:
Can use auto and drop the .getReg(0)s throughout on OutPos
https://github.com/llvm/llvm-project/pull/92289
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