[llvm] [RISCV][MC] Implicit 0-offset aliases for JR/JALR (PR #94688)
Sam Elliott via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 6 14:58:53 PDT 2024
https://github.com/lenary created https://github.com/llvm/llvm-project/pull/94688
This broadly follows how in almost all places, we accept `(<reg>)` to mean `0(<reg>)`, but I think these are the first like this for Jumps rather than Loads/Stores. These are accepted by binutils but not by LLVM: https://godbolt.org/z/GK7MGE7q7
>From d3c27ff7fa4094b73245a285b6162e3f4d7d6bcd Mon Sep 17 00:00:00 2001
From: Sam Elliott <quic_aelliott at quicinc.com>
Date: Thu, 6 Jun 2024 07:46:15 -0700
Subject: [PATCH] [RISCV][MC] Implicit 0-offset aliases for JR/JALR
This broadly follows how in almost all places, we accept `(<reg>)` to
mean `0(<reg>)`, but I think these are the first like this for Jumps
rather than Loads/Stores. These are accepted by binutils but not by
LLVM: https://godbolt.org/z/GK7MGE7q7
---
llvm/lib/Target/RISCV/RISCVInstrInfo.td | 3 +++
llvm/test/MC/RISCV/rvi-aliases-valid.s | 10 ++++++++++
2 files changed, 13 insertions(+)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
index a1b078910e29c..c73fc52ee729d 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
@@ -943,6 +943,9 @@ def : InstAlias<"ret", (JALR X0, X1, 0), 4>;
def : InstAlias<"jr $rs, $offset", (JALR X0, GPR:$rs, simm12:$offset), 0>;
def : InstAlias<"jalr $rs, $offset", (JALR X1, GPR:$rs, simm12:$offset), 0>;
def : InstAlias<"jalr $rd, $rs, $offset", (JALR GPR:$rd, GPR:$rs, simm12:$offset), 0>;
+def : InstAlias<"jr (${rs})", (JALR X0, GPR:$rs, 0), 0>;
+def : InstAlias<"jalr (${rs})", (JALR X1, GPR:$rs, 0), 0>;
+def : InstAlias<"jalr $rd, (${rs})", (JALR GPR:$rd, GPR:$rs, 0), 0>;
def : InstAlias<"fence", (FENCE 0xF, 0xF)>; // 0xF == iorw
diff --git a/llvm/test/MC/RISCV/rvi-aliases-valid.s b/llvm/test/MC/RISCV/rvi-aliases-valid.s
index 098d5c132c98c..613fc25cdf3af 100644
--- a/llvm/test/MC/RISCV/rvi-aliases-valid.s
+++ b/llvm/test/MC/RISCV/rvi-aliases-valid.s
@@ -190,6 +190,16 @@ jalr x25, x26, 11
# CHECK-S-OBJ-NOALIAS: jalr zero, 0(ra)
# CHECK-S-OBJ: ret
ret
+# CHECK-S-OBJ-NOALIAS: jalr zero, 0(s11)
+# CHECK-S-OBJ: jr s11
+jr (x27)
+# CHECK-S-OBJ-NOALIAS: jalr ra, 0(t3)
+# CHECK-S-OBJ: jalr t3
+jalr (x28)
+# CHECK-S-OBJ-NOALIAS: jalr t4, 0(t5)
+# CHECK-S-OBJ: jalr t4, t5
+jalr x29, x30
+
# TODO call
# TODO tail
More information about the llvm-commits
mailing list