[llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 6 11:04:18 PDT 2024
================
@@ -3741,6 +3741,19 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
if (!DstBank)
DstBank = SrcBank;
+ // For i1 function arguments, the call of getRegBank() currently gives
+ // incorrect result. We set both src and dst banks to VCCRegBank.
+ if (!MI.getOperand(1).getReg().isVirtual() &&
+ MRI.getType(MI.getOperand(0).getReg()) == LLT::scalar(1)) {
+ DstBank = SrcBank = &AMDGPU::VCCRegBank;
+ }
+
+ // For i1 return value, the dst reg is an SReg but we need to set the reg
+ // bank to VCCRegBank.
+ if (!MI.getOperand(0).getReg().isVirtual() &&
+ SrcBank == &AMDGPU::VCCRegBank)
+ DstBank = SrcBank;
+
----------------
arsenm wrote:
Ping
https://github.com/llvm/llvm-project/pull/72461
More information about the llvm-commits
mailing list