[llvm] goldsteinn/and or p2 w zero (PR #94648)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 6 10:56:47 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: None (goldsteinn)
<details>
<summary>Changes</summary>
- **[InstCombine] Add tests for transforming `(or/and (icmp eq/ne X,0),(icmp eq/ne X,Pow2OrZero))`; NFC**
- **[InstCombine] Add transforms for `(or/and (icmp eq/ne X,0),(icmp eq/ne X,Pow2OrZero))`**
---
Full diff: https://github.com/llvm/llvm-project/pull/94648.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (+37)
- (modified) llvm/test/Transforms/InstCombine/and-or-icmps.ll (+150-6)
``````````diff
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index 8695e9e69df2..89eb583ee427 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -701,6 +701,38 @@ Value *InstCombinerImpl::simplifyRangeCheck(ICmpInst *Cmp0, ICmpInst *Cmp1,
return Builder.CreateICmp(NewPred, Input, RangeEnd);
}
+// (or (icmp eq X, 0), (icmp eq X, Pow2OrZero))
+// -> (icmp eq (and X, Pow2OrZero), X)
+// (and (icmp ne X, 0), (icmp ne X, Pow2OrZero))
+// -> (icmp ne (and X, Pow2OrZero), X)
+static Value *
+foldAndOrOfICmpsWithPow2AndWithZero(InstCombiner::BuilderTy &Builder,
+ ICmpInst *LHS, ICmpInst *RHS, bool IsAnd,
+ const SimplifyQuery &Q) {
+ CmpInst::Predicate Pred = IsAnd ? CmpInst::ICMP_NE : CmpInst::ICMP_EQ;
+ // Make sure we have right compares for our op.
+ if (LHS->getPredicate() != Pred || RHS->getPredicate() != Pred)
+ return nullptr;
+
+ // Make it so we can match LHS against the (icmp eq/ne X, 0) just for
+ // simplicity.
+ if (match(RHS->getOperand(1), m_Zero()))
+ std::swap(LHS, RHS);
+
+ Value *Pow2, *Op;
+ // Match the desired pattern:
+ // LHS: (icmp eq/ne X, 0)
+ // RHS: (icmp eq/ne X, Pow2OrZero)
+ if (!match(LHS, m_ICmp(Pred, m_Value(Op), m_Zero())) ||
+ !match(RHS, m_c_ICmp(Pred, m_Specific(Op), m_Value(Pow2))) ||
+ !isKnownToBeAPowerOfTwo(Pow2, Q.DL, /*OrZero*/ true, /*Depth*/ 0, Q.AC,
+ Q.CxtI, Q.DT))
+ return nullptr;
+
+ Value *And = Builder.CreateAnd(Op, Pow2);
+ return Builder.CreateICmp(Pred, And, Op);
+}
+
// Fold (iszero(A & K1) | iszero(A & K2)) -> (A & (K1 | K2)) != (K1 | K2)
// Fold (!iszero(A & K1) & !iszero(A & K2)) -> (A & (K1 | K2)) == (K1 | K2)
Value *InstCombinerImpl::foldAndOrOfICmpsOfAndWithPow2(ICmpInst *LHS,
@@ -3240,6 +3272,11 @@ Value *InstCombinerImpl::foldAndOrOfICmps(ICmpInst *LHS, ICmpInst *RHS,
ICmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate();
Value *LHS0 = LHS->getOperand(0), *RHS0 = RHS->getOperand(0);
Value *LHS1 = LHS->getOperand(1), *RHS1 = RHS->getOperand(1);
+ if (!IsLogical)
+ if (Value *V =
+ foldAndOrOfICmpsWithPow2AndWithZero(Builder, LHS, RHS, IsAnd, Q))
+ return V;
+
const APInt *LHSC = nullptr, *RHSC = nullptr;
match(LHS1, m_APInt(LHSC));
match(RHS1, m_APInt(RHSC));
diff --git a/llvm/test/Transforms/InstCombine/and-or-icmps.ll b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
index c20f48a985b3..14ac3e404774 100644
--- a/llvm/test/Transforms/InstCombine/and-or-icmps.ll
+++ b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
@@ -3057,9 +3057,9 @@ define i32 @icmp_slt_0_or_icmp_add_1_sge_100_i32_fail(i32 %x) {
define i1 @logical_and_icmps1(i32 %a, i1 %other_cond) {
; CHECK-LABEL: @logical_and_icmps1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i32 [[A:%.*]], 10086
-; CHECK-NEXT: [[RET2:%.*]] = select i1 [[RET1:%.*]], i1 [[CMP3]], i1 false
-; CHECK-NEXT: ret i1 [[RET2]]
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[A:%.*]], 10086
+; CHECK-NEXT: [[RET:%.*]] = select i1 [[OTHER_COND:%.*]], i1 [[TMP0]], i1 false
+; CHECK-NEXT: ret i1 [[RET]]
;
entry:
%cmp1 = icmp sgt i32 %a, -1
@@ -3085,9 +3085,9 @@ entry:
define <4 x i1> @logical_and_icmps_vec1(<4 x i32> %a, <4 x i1> %other_cond) {
; CHECK-LABEL: @logical_and_icmps_vec1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP3:%.*]] = icmp ult <4 x i32> [[A:%.*]], <i32 10086, i32 10086, i32 10086, i32 10086>
-; CHECK-NEXT: [[RET2:%.*]] = select <4 x i1> [[RET1:%.*]], <4 x i1> [[CMP3]], <4 x i1> zeroinitializer
-; CHECK-NEXT: ret <4 x i1> [[RET2]]
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i32> [[A:%.*]], <i32 10086, i32 10086, i32 10086, i32 10086>
+; CHECK-NEXT: [[RET:%.*]] = select <4 x i1> [[OTHER_COND:%.*]], <4 x i1> [[TMP0]], <4 x i1> zeroinitializer
+; CHECK-NEXT: ret <4 x i1> [[RET]]
;
entry:
%cmp1 = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1 >
@@ -3113,3 +3113,147 @@ entry:
%ret = select i1 %logical_and, i1 %cmp2, i1 false
ret i1 %ret
}
+
+
+define i1 @icmp_eq_or_z_or_pow2orz(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[POW2ORZ]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], [[X]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 0
+ %cp2 = icmp eq i8 %x, %pow2orz
+ %r = or i1 %c0, %cp2
+ ret i1 %r
+}
+
+
+define i1 @icmp_eq_or_z_or_pow2orz_fail_logic_or(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_logic_or(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C0]], i1 true, i1 [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 0
+ %cp2 = icmp eq i8 %x, %pow2orz
+ %r = select i1 %c0, i1 true, i1 %cp2
+ ret i1 %r
+}
+
+
+define <2 x i1> @icmp_ne_and_z_and_pow2orz(<2 x i8> %x, <2 x i8> %y) {
+; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz(
+; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[POW2ORZ]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]]
+; CHECK-NEXT: ret <2 x i1> [[R]]
+;
+ %ny = sub <2 x i8> zeroinitializer, %y
+ %pow2orz = and <2 x i8> %ny, %y
+
+ %c0 = icmp ne <2 x i8> %x, zeroinitializer
+ %cp2 = icmp ne <2 x i8> %x, %pow2orz
+ %r = and <2 x i1> %c0, %cp2
+ ret <2 x i1> %r
+}
+
+define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_logic_and(<2 x i8> %x, <2 x i8> %y) {
+; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_logic_and(
+; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[CP2:%.*]] = icmp ne <2 x i8> [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C0]], <2 x i1> [[CP2]], <2 x i1> zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[R]]
+;
+ %ny = sub <2 x i8> zeroinitializer, %y
+ %pow2orz = and <2 x i8> %ny, %y
+
+ %c0 = icmp ne <2 x i8> %x, zeroinitializer
+ %cp2 = icmp ne <2 x i8> %x, %pow2orz
+ %r = select <2 x i1> %c0, <2 x i1> %cp2, <2 x i1> zeroinitializer
+ ret <2 x i1> %r
+}
+
+define i1 @icmp_eq_or_z_or_pow2orz_fail_not_pow2(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_not_pow2(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 1, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 1, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 0
+ %cp2 = icmp eq i8 %x, %pow2orz
+ %r = or i1 %c0, %cp2
+ ret i1 %r
+}
+
+define i1 @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 1
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 1
+ %cp2 = icmp eq i8 %x, %pow2orz
+ %r = or i1 %c0, %cp2
+ ret i1 %r
+}
+
+define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_bad_pred(<2 x i8> %x, <2 x i8> %y) {
+; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_bad_pred(
+; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
+; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i8> [[POW2ORZ]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[R]]
+;
+ %ny = sub <2 x i8> zeroinitializer, %y
+ %pow2orz = and <2 x i8> %ny, %y
+
+ %c0 = icmp eq <2 x i8> %x, zeroinitializer
+ %cp2 = icmp eq <2 x i8> %x, %pow2orz
+ %r = and <2 x i1> %c0, %cp2
+ ret <2 x i1> %r
+}
+
+define i1 @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp slt i8 [[X:%.*]], 1
+; CHECK-NEXT: [[CP2:%.*]] = icmp sge i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp sle i8 %x, 0
+ %cp2 = icmp sle i8 %x, %pow2orz
+ %r = or i1 %c0, %cp2
+ ret i1 %r
+}
``````````
</details>
https://github.com/llvm/llvm-project/pull/94648
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