[llvm] [WIP][PowerPC] Add phony subregisters to cover the high half of the VSX registers. (PR #94628)

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git-clang-format --diff 6b9753a0ecf7fdea203c6faf23c3ad4bf432273c eaaad1691cc732c4c4e53197d2d629c1bb5dcb74 -- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index a2d089f32c..9982baf2bc 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -503,23 +503,19 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   Reserved.set(PPC::VFH30);
   Reserved.set(PPC::VFH31);
 
-  assert(checkAllSuperRegsMarked(Reserved,
-			         {PPC::FH0,  PPC::FH1,  PPC::FH2,  PPC::FH3,
-				  PPC::FH4,  PPC::FH5,  PPC::FH6,  PPC::FH7,
-				  PPC::FH8,  PPC::FH9,  PPC::FH10, PPC::FH11,
-				  PPC::FH12, PPC::FH13, PPC::FH14, PPC::FH15, 
-				  PPC::FH16, PPC::FH17, PPC::FH18, PPC::FH19,
-				  PPC::FH20, PPC::FH21, PPC::FH22, PPC::FH23,
-				  PPC::FH24, PPC::FH25, PPC::FH26, PPC::FH27,
-				  PPC::FH28, PPC::FH29, PPC::FH30, PPC::FH31, 
-				  PPC::VFH0,  PPC::VFH1,  PPC::VFH2,  PPC::VFH3,
-				  PPC::VFH4,  PPC::VFH5,  PPC::VFH6,  PPC::VFH7,
-				  PPC::VFH8,  PPC::VFH9,  PPC::VFH10, PPC::VFH11,
-				  PPC::VFH12, PPC::VFH13, PPC::VFH14, PPC::VFH15, 
-				  PPC::VFH16, PPC::VFH17, PPC::VFH18, PPC::VFH19,
-				  PPC::VFH20, PPC::VFH21, PPC::VFH22, PPC::VFH23,
-				  PPC::VFH24, PPC::VFH25, PPC::VFH26, PPC::VFH27,
-				  PPC::VFH28, PPC::VFH29, PPC::VFH30, PPC::VFH31}));
+  assert(checkAllSuperRegsMarked(
+      Reserved,
+      {PPC::FH0,   PPC::FH1,   PPC::FH2,   PPC::FH3,   PPC::FH4,   PPC::FH5,
+       PPC::FH6,   PPC::FH7,   PPC::FH8,   PPC::FH9,   PPC::FH10,  PPC::FH11,
+       PPC::FH12,  PPC::FH13,  PPC::FH14,  PPC::FH15,  PPC::FH16,  PPC::FH17,
+       PPC::FH18,  PPC::FH19,  PPC::FH20,  PPC::FH21,  PPC::FH22,  PPC::FH23,
+       PPC::FH24,  PPC::FH25,  PPC::FH26,  PPC::FH27,  PPC::FH28,  PPC::FH29,
+       PPC::FH30,  PPC::FH31,  PPC::VFH0,  PPC::VFH1,  PPC::VFH2,  PPC::VFH3,
+       PPC::VFH4,  PPC::VFH5,  PPC::VFH6,  PPC::VFH7,  PPC::VFH8,  PPC::VFH9,
+       PPC::VFH10, PPC::VFH11, PPC::VFH12, PPC::VFH13, PPC::VFH14, PPC::VFH15,
+       PPC::VFH16, PPC::VFH17, PPC::VFH18, PPC::VFH19, PPC::VFH20, PPC::VFH21,
+       PPC::VFH22, PPC::VFH23, PPC::VFH24, PPC::VFH25, PPC::VFH26, PPC::VFH27,
+       PPC::VFH28, PPC::VFH29, PPC::VFH30, PPC::VFH31}));
   return Reserved;
 }
 

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https://github.com/llvm/llvm-project/pull/94628