[llvm] [CodeGen][MachineLICM] Use RegUnits in HoistRegionPostRA (PR #94608)

[Matt Arsenault via llvm-commits]

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@@ -423,10 +423,25 @@ static bool InstructionStoresToFI(const MachineInstr *MI, int FI) {
   return false;
 }
 
+static void applyBitsNotInRegMaskToRegUnitsMask(const TargetRegisterInfo *TRI,
+                                                BitVector &RUs,
+                                                const uint32_t *Mask) {
+  // FIXME: Use RUs better here
+  BitVector MaskedRegs(TRI->getNumRegs());
+  MaskedRegs.setBitsNotInMask(Mask);
+  for (const auto &Set : MaskedRegs.set_bits()) {
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arsenm wrote:

```suggestion
  for (unsigned SetBitIndex : MaskedRegs.set_bits()) {
```

https://github.com/llvm/llvm-project/pull/94608