[llvm] [arm64] Add tan intrinsic lowering (PR #94545)
Farzon Lotfi via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 5 23:58:18 PDT 2024
================
@@ -1171,13 +1172,15 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
if (Subtarget->isNeonAvailable()) {
// FIXME: v1f64 shouldn't be legal if we can avoid it, because it leads to
// silliness like this:
+ // clang-format off
for (auto Op :
{ISD::SELECT, ISD::SELECT_CC,
ISD::BR_CC, ISD::FADD, ISD::FSUB,
ISD::FMUL, ISD::FDIV, ISD::FMA,
ISD::FNEG, ISD::FABS, ISD::FCEIL,
ISD::FSQRT, ISD::FFLOOR, ISD::FNEARBYINT,
- ISD::FSIN, ISD::FCOS, ISD::FPOW,
+ ISD::FSIN, ISD::FCOS, ISD::FTAN,
+ ISD::FPOW,
----------------
farzonl wrote:
That would cascading line changes, which I thought might make the change look bigger than it is. . That said I could but I was hoping to create some room for the other trig intrinsics I have planned to add from that RFC. No strong feeling though, so if youwant it i'll make it happen.
https://github.com/llvm/llvm-project/pull/94545
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