[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)
Shao-Ce SUN via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 5 22:26:39 PDT 2024
================
@@ -381,3 +381,32 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+def SPACEMIT_K1 : RISCVProcessorModel<"spacemit-k1",
+ NoSchedModel,
+ [Feature64Bit,
+ FeatureStdExtI,
+ FeatureStdExtM,
+ FeatureStdExtA,
+ FeatureStdExtF,
+ FeatureStdExtD,
+ FeatureStdExtC,
+ FeatureStdExtV,
+ FeatureStdExtZba,
+ FeatureStdExtZbb,
+ FeatureStdExtZbc,
+ FeatureStdExtZbs,
+ FeatureStdExtZbkb,
+ FeatureStdExtZbkc,
+ FeatureStdExtZfh,
+ FeatureStdExtZfhmin,
+ FeatureStdExtZicond,
+ FeatureStdExtZicsr,
+ FeatureStdExtZifencei,
+ FeatureStdExtZmmul,
+ FeatureStdExtZvfh,
+ FeatureStdExtZvfhmin,
+ FeatureStdExtZvl32b,
+ FeatureStdExtZvl64b,
+ FeatureStdExtZvl128b,
+ FeatureStdExtZvl256b]>;
----------------
sunshaoce wrote:
Addressed. Thanks!
https://github.com/llvm/llvm-project/pull/94564
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