[llvm] [X86][AMX] Checking AMXProgModel in X86LowerTileCopy (PR #94358)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 5 21:10:41 PDT 2024
phoebewang wrote:
> I did my best to look at this, but I don't feel really qualified to review AMX. I like the idea (very similar to what I had in mind) and this generally looks good, but I have a few questions/points where I'm unsure.
Thanks @aengelke for looking at this! All are good questions!
> * Maybe add a short comment explaining the two AMX modes? If there's some documentation elsewhere, I couldn't find it.
This is a tech debt for a long time. And since previous authors not working on this, we may not able to complete it in a short time.
A short introduction would be:
- DirectReg model provides ablities to operate AMX instructions with immediate register number through intrinsics.
- ManagedRA model provides managed register allocation as well as AMX configuration from the compiler. User still needs to use intrinsics.
Some documents scattered in [Intel Intrinsic Guide](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#techs=AMX), [Clang doxygen](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#techs=AMX) and some [technical paper](https://www.intel.com/content/www/us/en/developer/articles/technical/whats-new-in-llvm-for-4th-gen-intel-xeon-processor.html) etc.
But this is not quite related to this patch, and I don't find a good place for it.
> * For managed RA, the only sources of AMX values are zero, load and cast intrinsics. Whenever a load/zero(/store) occurs, the mode is set accordingly. Looks good. What about casts from vectors?
AMX casts were handled by X86LowerAMXType before ISel. They all have been transformed into load/store at this phase.
> * For unmanaged RA, all (?) (non-internal) intrinsics should set the prog model. So there's zero, load, store, and the actual operations. Zero, load, store are handled, ok. But shouldn't any occurrence of the compute intrinsics also set the prog model? (Can they theoretically occur alone?)
Yes, it should happen in theory, but using them without zero, load or strore can be seem as an invalid use scenario. We can save verbose `setAMXProgModel` by considering it is UB and not to handle it.
https://github.com/llvm/llvm-project/pull/94358
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