[llvm] [SimplifyCFG] Don't use a mask for lookup tables generated from switches with an unreachable default case (PR #94468)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 5 09:05:40 PDT 2024
https://github.com/DaMatrix updated https://github.com/llvm/llvm-project/pull/94468
>From e15d3eddfb82317073a922346f515d9b0d53698d Mon Sep 17 00:00:00 2001
From: DaPorkchop_ <daporkchop at daporkchop.net>
Date: Wed, 5 Jun 2024 13:22:46 +0200
Subject: [PATCH 1/2] [SimplifyCFG] Add tests for big lookup tables which
exceed the mask size and lookup tables with reachable/unreachable default
cases
---
.../RISCV/switch-of-powers-of-two.ll | 62 +-
.../SimplifyCFG/X86/switch_to_lookup_table.ll | 111 +-
.../X86/switch_to_lookup_table_big.ll | 1683 +++++++++++++++++
3 files changed, 1795 insertions(+), 61 deletions(-)
create mode 100644 llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll
diff --git a/llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll b/llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll
index 893d1e0ff60b5..3ded78d85a610 100644
--- a/llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll
+++ b/llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll
@@ -11,11 +11,11 @@ define i32 @switch_of_powers(i32 %x) {
; RV64I-LABEL: @switch_of_powers(
; RV64I-NEXT: entry:
; RV64I-NEXT: switch i32 [[X:%.*]], label [[DEFAULT_CASE:%.*]] [
-; RV64I-NEXT: i32 1, label [[RETURN:%.*]]
-; RV64I-NEXT: i32 8, label [[BB2:%.*]]
-; RV64I-NEXT: i32 16, label [[BB3:%.*]]
-; RV64I-NEXT: i32 32, label [[BB4:%.*]]
-; RV64I-NEXT: i32 64, label [[BB5:%.*]]
+; RV64I-NEXT: i32 1, label [[RETURN:%.*]]
+; RV64I-NEXT: i32 8, label [[BB2:%.*]]
+; RV64I-NEXT: i32 16, label [[BB3:%.*]]
+; RV64I-NEXT: i32 32, label [[BB4:%.*]]
+; RV64I-NEXT: i32 64, label [[BB5:%.*]]
; RV64I-NEXT: ]
; RV64I: default_case:
; RV64I-NEXT: unreachable
@@ -69,11 +69,11 @@ define i32 @switch_of_powers_reachable_default(i32 %x) {
; CHECK-LABEL: @switch_of_powers_reachable_default(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[X:%.*]], label [[RETURN:%.*]] [
-; CHECK-NEXT: i32 1, label [[BB1:%.*]]
-; CHECK-NEXT: i32 8, label [[BB2:%.*]]
-; CHECK-NEXT: i32 16, label [[BB3:%.*]]
-; CHECK-NEXT: i32 32, label [[BB4:%.*]]
-; CHECK-NEXT: i32 64, label [[BB5:%.*]]
+; CHECK-NEXT: i32 1, label [[BB1:%.*]]
+; CHECK-NEXT: i32 8, label [[BB2:%.*]]
+; CHECK-NEXT: i32 16, label [[BB3:%.*]]
+; CHECK-NEXT: i32 32, label [[BB4:%.*]]
+; CHECK-NEXT: i32 64, label [[BB5:%.*]]
; CHECK-NEXT: ]
; CHECK: bb1:
; CHECK-NEXT: br label [[RETURN]]
@@ -116,11 +116,11 @@ define i32 @switch_of_non_powers(i32 %x) {
; CHECK-LABEL: @switch_of_non_powers(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[X:%.*]], label [[DEFAULT_CASE:%.*]] [
-; CHECK-NEXT: i32 0, label [[RETURN:%.*]]
-; CHECK-NEXT: i32 1, label [[BB2:%.*]]
-; CHECK-NEXT: i32 16, label [[BB3:%.*]]
-; CHECK-NEXT: i32 32, label [[BB4:%.*]]
-; CHECK-NEXT: i32 64, label [[BB5:%.*]]
+; CHECK-NEXT: i32 0, label [[RETURN:%.*]]
+; CHECK-NEXT: i32 1, label [[BB2:%.*]]
+; CHECK-NEXT: i32 16, label [[BB3:%.*]]
+; CHECK-NEXT: i32 32, label [[BB4:%.*]]
+; CHECK-NEXT: i32 64, label [[BB5:%.*]]
; CHECK-NEXT: ]
; CHECK: default_case:
; CHECK-NEXT: unreachable
@@ -162,10 +162,10 @@ define i32 @unable_to_create_dense_switch(i32 %x) {
; CHECK-LABEL: @unable_to_create_dense_switch(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[X:%.*]], label [[DEFAULT_CASE:%.*]] [
-; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
-; CHECK-NEXT: i32 2, label [[BB3:%.*]]
-; CHECK-NEXT: i32 4, label [[BB4:%.*]]
-; CHECK-NEXT: i32 4096, label [[BB5:%.*]]
+; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
+; CHECK-NEXT: i32 2, label [[BB3:%.*]]
+; CHECK-NEXT: i32 4, label [[BB4:%.*]]
+; CHECK-NEXT: i32 4096, label [[BB5:%.*]]
; CHECK-NEXT: ]
; CHECK: default_case:
; CHECK-NEXT: unreachable
@@ -205,10 +205,10 @@ define i32 @unable_to_generate_lookup_table(i32 %x, i32 %y) {
; RV64I-LABEL: @unable_to_generate_lookup_table(
; RV64I-NEXT: entry:
; RV64I-NEXT: switch i32 [[Y:%.*]], label [[DEFAULT_CASE:%.*]] [
-; RV64I-NEXT: i32 1, label [[BB2:%.*]]
-; RV64I-NEXT: i32 2, label [[BB3:%.*]]
-; RV64I-NEXT: i32 8, label [[BB4:%.*]]
-; RV64I-NEXT: i32 64, label [[BB5:%.*]]
+; RV64I-NEXT: i32 1, label [[BB2:%.*]]
+; RV64I-NEXT: i32 2, label [[BB3:%.*]]
+; RV64I-NEXT: i32 8, label [[BB4:%.*]]
+; RV64I-NEXT: i32 64, label [[BB5:%.*]]
; RV64I-NEXT: ]
; RV64I: default_case:
; RV64I-NEXT: unreachable
@@ -239,10 +239,10 @@ define i32 @unable_to_generate_lookup_table(i32 %x, i32 %y) {
; RV64ZBB-NEXT: entry:
; RV64ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.cttz.i32(i32 [[Y:%.*]], i1 true)
; RV64ZBB-NEXT: switch i32 [[TMP0]], label [[DEFAULT_CASE:%.*]] [
-; RV64ZBB-NEXT: i32 0, label [[BB2:%.*]]
-; RV64ZBB-NEXT: i32 1, label [[BB3:%.*]]
-; RV64ZBB-NEXT: i32 3, label [[BB4:%.*]]
-; RV64ZBB-NEXT: i32 6, label [[BB5:%.*]]
+; RV64ZBB-NEXT: i32 0, label [[BB2:%.*]]
+; RV64ZBB-NEXT: i32 1, label [[BB3:%.*]]
+; RV64ZBB-NEXT: i32 3, label [[BB4:%.*]]
+; RV64ZBB-NEXT: i32 6, label [[BB5:%.*]]
; RV64ZBB-NEXT: ]
; RV64ZBB: default_case:
; RV64ZBB-NEXT: unreachable
@@ -314,10 +314,10 @@ define i128 @switch_with_long_condition(i128 %x) {
; CHECK-LABEL: @switch_with_long_condition(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i128 [[X:%.*]], label [[DEFAULT_CASE:%.*]] [
-; CHECK-NEXT: i128 1, label [[RETURN:%.*]]
-; CHECK-NEXT: i128 2, label [[BB3:%.*]]
-; CHECK-NEXT: i128 4, label [[BB4:%.*]]
-; CHECK-NEXT: i128 32, label [[BB5:%.*]]
+; CHECK-NEXT: i128 1, label [[RETURN:%.*]]
+; CHECK-NEXT: i128 2, label [[BB3:%.*]]
+; CHECK-NEXT: i128 4, label [[BB4:%.*]]
+; CHECK-NEXT: i128 32, label [[BB5:%.*]]
; CHECK-NEXT: ]
; CHECK: default_case:
; CHECK-NEXT: unreachable
diff --git a/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll b/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
index 9d6502072c16b..9d18bb15bce8e 100644
--- a/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
+++ b/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
@@ -308,10 +308,10 @@ define i32 @overflow(i32 %type) {
; CHECK-LABEL: @overflow(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[TYPE:%.*]], label [[IF_END:%.*]] [
-; CHECK-NEXT: i32 3, label [[SW_BB3:%.*]]
-; CHECK-NEXT: i32 -2147483645, label [[SW_BB3]]
-; CHECK-NEXT: i32 1, label [[SW_BB1:%.*]]
-; CHECK-NEXT: i32 2, label [[SW_BB2:%.*]]
+; CHECK-NEXT: i32 3, label [[SW_BB3:%.*]]
+; CHECK-NEXT: i32 -2147483645, label [[SW_BB3]]
+; CHECK-NEXT: i32 1, label [[SW_BB1:%.*]]
+; CHECK-NEXT: i32 2, label [[SW_BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: sw.bb1:
; CHECK-NEXT: br label [[IF_END]]
@@ -931,11 +931,11 @@ define i96 @illegaltype(i32 %c) {
; CHECK-LABEL: @illegaltype(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[C:%.*]], label [[SW_DEFAULT:%.*]] [
-; CHECK-NEXT: i32 42, label [[RETURN:%.*]]
-; CHECK-NEXT: i32 43, label [[SW_BB1:%.*]]
-; CHECK-NEXT: i32 44, label [[SW_BB2:%.*]]
-; CHECK-NEXT: i32 45, label [[SW_BB3:%.*]]
-; CHECK-NEXT: i32 46, label [[SW_BB4:%.*]]
+; CHECK-NEXT: i32 42, label [[RETURN:%.*]]
+; CHECK-NEXT: i32 43, label [[SW_BB1:%.*]]
+; CHECK-NEXT: i32 44, label [[SW_BB2:%.*]]
+; CHECK-NEXT: i32 45, label [[SW_BB3:%.*]]
+; CHECK-NEXT: i32 46, label [[SW_BB4:%.*]]
; CHECK-NEXT: ]
; CHECK: sw.bb1:
; CHECK-NEXT: br label [[RETURN]]
@@ -1050,9 +1050,9 @@ define i32 @threecasesholes(i32 %c) {
; CHECK-LABEL: @threecasesholes(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[C:%.*]], label [[SW_DEFAULT:%.*]] [
-; CHECK-NEXT: i32 0, label [[RETURN:%.*]]
-; CHECK-NEXT: i32 1, label [[SW_BB1:%.*]]
-; CHECK-NEXT: i32 3, label [[SW_BB2:%.*]]
+; CHECK-NEXT: i32 0, label [[RETURN:%.*]]
+; CHECK-NEXT: i32 1, label [[SW_BB1:%.*]]
+; CHECK-NEXT: i32 3, label [[SW_BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: sw.bb1:
; CHECK-NEXT: br label [[RETURN]]
@@ -1142,9 +1142,9 @@ define ptr @tls(i32 %x) {
; CHECK-LABEL: @tls(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[X:%.*]], label [[SW_DEFAULT:%.*]] [
-; CHECK-NEXT: i32 0, label [[RETURN:%.*]]
-; CHECK-NEXT: i32 1, label [[SW_BB1:%.*]]
-; CHECK-NEXT: i32 2, label [[SW_BB2:%.*]]
+; CHECK-NEXT: i32 0, label [[RETURN:%.*]]
+; CHECK-NEXT: i32 1, label [[SW_BB1:%.*]]
+; CHECK-NEXT: i32 2, label [[SW_BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: sw.bb1:
; CHECK-NEXT: br label [[RETURN]]
@@ -1182,9 +1182,9 @@ define ptr @dllimport(i32 %x) {
; CHECK-LABEL: @dllimport(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[X:%.*]], label [[SW_DEFAULT:%.*]] [
-; CHECK-NEXT: i32 0, label [[RETURN:%.*]]
-; CHECK-NEXT: i32 1, label [[SW_BB1:%.*]]
-; CHECK-NEXT: i32 2, label [[SW_BB2:%.*]]
+; CHECK-NEXT: i32 0, label [[RETURN:%.*]]
+; CHECK-NEXT: i32 1, label [[SW_BB1:%.*]]
+; CHECK-NEXT: i32 2, label [[SW_BB2:%.*]]
; CHECK-NEXT: ]
; CHECK: sw.bb1:
; CHECK-NEXT: br label [[RETURN]]
@@ -1476,11 +1476,11 @@ define void @pr20210(i8 %x, i1 %y) {
; CHECK-NEXT: br i1 [[Y:%.*]], label [[SW:%.*]], label [[INTERMEDIATE:%.*]]
; CHECK: sw:
; CHECK-NEXT: switch i8 [[X:%.*]], label [[END:%.*]] [
-; CHECK-NEXT: i8 7, label [[INTERMEDIATE]]
-; CHECK-NEXT: i8 3, label [[INTERMEDIATE]]
-; CHECK-NEXT: i8 2, label [[INTERMEDIATE]]
-; CHECK-NEXT: i8 1, label [[INTERMEDIATE]]
-; CHECK-NEXT: i8 0, label [[INTERMEDIATE]]
+; CHECK-NEXT: i8 7, label [[INTERMEDIATE]]
+; CHECK-NEXT: i8 3, label [[INTERMEDIATE]]
+; CHECK-NEXT: i8 2, label [[INTERMEDIATE]]
+; CHECK-NEXT: i8 1, label [[INTERMEDIATE]]
+; CHECK-NEXT: i8 0, label [[INTERMEDIATE]]
; CHECK-NEXT: ]
; CHECK: intermediate:
; CHECK-NEXT: [[Z:%.*]] = zext i8 [[X]] to i32
@@ -1612,15 +1612,15 @@ define void @wineh_test(i64 %val) personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @wineh_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: invoke void @throw(i1 false)
-; CHECK-NEXT: to label [[UNREACHABLE:%.*]] unwind label [[CLEANUP1:%.*]]
+; CHECK-NEXT: to label [[UNREACHABLE:%.*]] unwind label [[CLEANUP1:%.*]]
; CHECK: unreachable:
; CHECK-NEXT: unreachable
; CHECK: cleanup1:
; CHECK-NEXT: [[CLEANUPPAD1:%.*]] = cleanuppad within none []
; CHECK-NEXT: switch i64 [[VAL:%.*]], label [[CLEANUPDONE2:%.*]] [
-; CHECK-NEXT: i64 0, label [[CLEANUPDONE1:%.*]]
-; CHECK-NEXT: i64 1, label [[CLEANUPDONE1]]
-; CHECK-NEXT: i64 6, label [[CLEANUPDONE1]]
+; CHECK-NEXT: i64 0, label [[CLEANUPDONE1:%.*]]
+; CHECK-NEXT: i64 1, label [[CLEANUPDONE1]]
+; CHECK-NEXT: i64 6, label [[CLEANUPDONE1]]
; CHECK-NEXT: ]
; CHECK: cleanupdone1:
; CHECK-NEXT: cleanupret from [[CLEANUPPAD1]] unwind label [[CLEANUP2:%.*]]
@@ -1733,9 +1733,9 @@ define i32 @signed_overflow2(i8 %n) {
; CHECK-NEXT: start:
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i8 [[N:%.*]] to i2
; CHECK-NEXT: switch i2 [[TRUNC]], label [[BB1:%.*]] [
-; CHECK-NEXT: i2 1, label [[BB6:%.*]]
-; CHECK-NEXT: i2 -2, label [[BB4:%.*]]
-; CHECK-NEXT: i2 -1, label [[BB5:%.*]]
+; CHECK-NEXT: i2 1, label [[BB6:%.*]]
+; CHECK-NEXT: i2 -2, label [[BB4:%.*]]
+; CHECK-NEXT: i2 -1, label [[BB5:%.*]]
; CHECK-NEXT: ]
; CHECK: bb1:
; CHECK-NEXT: unreachable
@@ -1772,6 +1772,57 @@ bb6: ; preds = %start, %bb3, %bb4,
ret i32 %.sroa.0.0
}
+; This is the same as @signed_overflow2 except that the default case calls @exit(), so it
+; isn't treated as unreachable
+define i32 @signed_overflow3(i8 %n) {
+; CHECK-LABEL: @signed_overflow3(
+; CHECK-NEXT: start:
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i8 [[N:%.*]] to i2
+; CHECK-NEXT: switch i2 [[TRUNC]], label [[START_UNREACHABLEDEFAULT:%.*]] [
+; CHECK-NEXT: i2 1, label [[BB6:%.*]]
+; CHECK-NEXT: i2 -2, label [[BB4:%.*]]
+; CHECK-NEXT: i2 -1, label [[BB5:%.*]]
+; CHECK-NEXT: i2 0, label [[BB1:%.*]]
+; CHECK-NEXT: ]
+; CHECK: start.unreachabledefault:
+; CHECK-NEXT: unreachable
+; CHECK: bb1:
+; CHECK-NEXT: call void @exit(i32 1)
+; CHECK-NEXT: unreachable
+; CHECK: bb4:
+; CHECK-NEXT: br label [[BB6]]
+; CHECK: bb5:
+; CHECK-NEXT: br label [[BB6]]
+; CHECK: bb6:
+; CHECK-NEXT: [[DOTSROA_0_0:%.*]] = phi i32 [ 4444, [[BB5]] ], [ 3333, [[BB4]] ], [ 2222, [[START:%.*]] ]
+; CHECK-NEXT: ret i32 [[DOTSROA_0_0]]
+;
+start:
+ %trunc = trunc i8 %n to i2
+ switch i2 %trunc, label %bb1 [
+ i2 1, label %bb3
+ i2 -2, label %bb4
+ i2 -1, label %bb5
+ ]
+
+bb1: ; preds = %start
+ call void @exit(i32 1)
+ unreachable
+
+bb3: ; preds = %start
+ br label %bb6
+
+bb4: ; preds = %start
+ br label %bb6
+
+bb5: ; preds = %start
+ br label %bb6
+
+bb6: ; preds = %start, %bb3, %bb4, %bb5
+ %.sroa.0.0 = phi i32 [ 4444, %bb5 ], [ 3333, %bb4 ], [ 2222, %bb3 ]
+ ret i32 %.sroa.0.0
+}
+
define i32 @signed_overflow_negative(i8 %n) {
; CHECK-LABEL: @signed_overflow_negative(
; CHECK-NEXT: start:
diff --git a/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll b/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll
new file mode 100644
index 0000000000000..cfa65720b9114
--- /dev/null
+++ b/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll
@@ -0,0 +1,1683 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: -p --check-globals
+; RUN: opt < %s -passes=simplifycfg -switch-to-lookup=true -keep-loops=false -S -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: opt < %s -passes='simplifycfg<no-keep-loops;switch-to-lookup>' -S -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i32:8:8-i16:16:16-i32:32:32-i32:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+;.
+; CHECK: @switch.table.reachable_default_dense_0to63 = private unnamed_addr constant [64 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1], align 8
+; CHECK: @switch.table.unreachable_default_dense_0to63 = private unnamed_addr constant [64 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1], align 8
+; CHECK: @switch.table.reachable_default_holes_0to63 = private unnamed_addr constant [64 x i32] [i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 5, i32 0, i32 3, i32 2, i32 1, i32 0, i32 0, i32 6, i32 5, i32 4, i32 3, i32 0, i32 1, i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 1], align 8
+; CHECK: @switch.table.unreachable_default_holes_0to63 = private unnamed_addr constant [64 x i32] [i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 5, i32 0, i32 3, i32 2, i32 1, i32 0, i32 0, i32 6, i32 5, i32 4, i32 3, i32 0, i32 1, i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 1], align 8
+; CHECK: @switch.table.reachable_default_dense_0to64 = private unnamed_addr constant [65 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0], align 8
+; CHECK: @switch.table.unreachable_default_dense_0to64 = private unnamed_addr constant [65 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0], align 8
+; CHECK: @switch.table.reachable_default_dense_0to130 = private unnamed_addr constant [131 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6], align 8
+; CHECK: @switch.table.unreachable_default_dense_0to130 = private unnamed_addr constant [131 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6], align 8
+;.
+define i32 @reachable_default_dense_0to63(i32 %x, i32 %y) {
+; CHECK-LABEL: @reachable_default_dense_0to63(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %0 = icmp ult i32 %x, 64
+; CHECK-NEXT: br i1 %0, label %switch.lookup, label %return
+; CHECK: switch.lookup:
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [64 x i32], ptr @switch.table.reachable_default_dense_0to63, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: br label %return
+; CHECK: return:
+; CHECK-NEXT: %res = phi i32 [ %switch.load, %switch.lookup ], [ %y, %entry ]
+; CHECK-NEXT: ret i32 %res
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 3, label %bb5
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 8, label %bb0
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 13, label %bb3
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 18, label %bb6
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 23, label %bb1
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 28, label %bb4
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 33, label %bb7
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 38, label %bb2
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 43, label %bb5
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 48, label %bb0
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 53, label %bb3
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 58, label %bb6
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 63, label %bb1
+ ]
+
+sw.default: br label %return
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ %y, %sw.default ], [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @unreachable_default_dense_0to63(i32 %x, i32 %y) {
+; CHECK-LABEL: @unreachable_default_dense_0to63(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [64 x i32], ptr @switch.table.unreachable_default_dense_0to63, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: ret i32 %switch.load
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 3, label %bb5
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 8, label %bb0
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 13, label %bb3
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 18, label %bb6
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 23, label %bb1
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 28, label %bb4
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 33, label %bb7
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 38, label %bb2
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 43, label %bb5
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 48, label %bb0
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 53, label %bb3
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 58, label %bb6
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 63, label %bb1
+ ]
+
+sw.default: unreachable
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @reachable_default_holes_0to63(i32 %x, i32 %y) {
+; CHECK-LABEL: @reachable_default_holes_0to63(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %0 = icmp ult i32 %x, 64
+; CHECK-NEXT: br i1 %0, label %switch.hole_check, label %return
+; CHECK: switch.hole_check:
+; CHECK-NEXT: %switch.maskindex = zext i32 %x to i64
+; CHECK-NEXT: %switch.shifted = lshr i64 -297528130221121801, %switch.maskindex
+; CHECK-NEXT: %switch.lobit = trunc i64 %switch.shifted to i1
+; CHECK-NEXT: br i1 %switch.lobit, label %switch.lookup, label %return
+; CHECK: switch.lookup:
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [64 x i32], ptr @switch.table.reachable_default_holes_0to63, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: br label %return
+; CHECK: return:
+; CHECK-NEXT: %res = phi i32 [ %switch.load, %switch.lookup ], [ %y, %switch.hole_check ], [ %y, %entry ]
+; CHECK-NEXT: ret i32 %res
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 63, label %bb1
+ ]
+
+sw.default: br label %return
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ %y, %sw.default ], [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @unreachable_default_holes_0to63(i32 %x, i32 %y) {
+; CHECK-LABEL: @unreachable_default_holes_0to63(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %switch.maskindex = zext i32 %x to i64
+; CHECK-NEXT: %switch.shifted = lshr i64 -297528130221121801, %switch.maskindex
+; CHECK-NEXT: %switch.lobit = trunc i64 %switch.shifted to i1
+; CHECK-NEXT: call void @llvm.assume(i1 %switch.lobit)
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [64 x i32], ptr @switch.table.unreachable_default_holes_0to63, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: ret i32 %switch.load
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 63, label %bb1
+ ]
+
+sw.default: unreachable
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @reachable_default_dense_0to64(i32 %x, i32 %y) {
+; CHECK-LABEL: @reachable_default_dense_0to64(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %0 = icmp ult i32 %x, 65
+; CHECK-NEXT: br i1 %0, label %switch.lookup, label %return
+; CHECK: switch.lookup:
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [65 x i32], ptr @switch.table.reachable_default_dense_0to64, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: br label %return
+; CHECK: return:
+; CHECK-NEXT: %res = phi i32 [ %switch.load, %switch.lookup ], [ %y, %entry ]
+; CHECK-NEXT: ret i32 %res
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 3, label %bb5
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 8, label %bb0
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 13, label %bb3
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 18, label %bb6
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 23, label %bb1
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 28, label %bb4
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 33, label %bb7
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 38, label %bb2
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 43, label %bb5
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 48, label %bb0
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 53, label %bb3
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 58, label %bb6
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 63, label %bb1
+ i32 64, label %bb0
+ ]
+
+sw.default: br label %return
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ %y, %sw.default ], [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @unreachable_default_dense_0to64(i32 %x, i32 %y) {
+; CHECK-LABEL: @unreachable_default_dense_0to64(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [65 x i32], ptr @switch.table.unreachable_default_dense_0to64, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: ret i32 %switch.load
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 3, label %bb5
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 8, label %bb0
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 13, label %bb3
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 18, label %bb6
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 23, label %bb1
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 28, label %bb4
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 33, label %bb7
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 38, label %bb2
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 43, label %bb5
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 48, label %bb0
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 53, label %bb3
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 58, label %bb6
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 63, label %bb1
+ i32 64, label %bb0
+ ]
+
+sw.default: unreachable
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @reachable_default_holes_0to64(i32 %x, i32 %y) {
+; CHECK-LABEL: @reachable_default_holes_0to64(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: switch i32 %x, label %return [
+; CHECK-NEXT: i32 0, label %bb0
+; CHECK-NEXT: i32 1, label %bb7
+; CHECK-NEXT: i32 2, label %bb6
+; CHECK-NEXT: i32 4, label %bb4
+; CHECK-NEXT: i32 5, label %bb3
+; CHECK-NEXT: i32 6, label %bb2
+; CHECK-NEXT: i32 7, label %bb1
+; CHECK-NEXT: i32 9, label %bb7
+; CHECK-NEXT: i32 10, label %bb6
+; CHECK-NEXT: i32 11, label %bb5
+; CHECK-NEXT: i32 12, label %bb4
+; CHECK-NEXT: i32 14, label %bb2
+; CHECK-NEXT: i32 15, label %bb1
+; CHECK-NEXT: i32 16, label %bb0
+; CHECK-NEXT: i32 17, label %bb7
+; CHECK-NEXT: i32 19, label %bb5
+; CHECK-NEXT: i32 20, label %bb4
+; CHECK-NEXT: i32 21, label %bb3
+; CHECK-NEXT: i32 22, label %bb2
+; CHECK-NEXT: i32 24, label %bb0
+; CHECK-NEXT: i32 25, label %bb7
+; CHECK-NEXT: i32 26, label %bb6
+; CHECK-NEXT: i32 27, label %bb5
+; CHECK-NEXT: i32 29, label %bb3
+; CHECK-NEXT: i32 30, label %bb2
+; CHECK-NEXT: i32 31, label %bb1
+; CHECK-NEXT: i32 32, label %bb0
+; CHECK-NEXT: i32 34, label %bb6
+; CHECK-NEXT: i32 35, label %bb5
+; CHECK-NEXT: i32 36, label %bb4
+; CHECK-NEXT: i32 37, label %bb3
+; CHECK-NEXT: i32 39, label %bb1
+; CHECK-NEXT: i32 40, label %bb0
+; CHECK-NEXT: i32 41, label %bb7
+; CHECK-NEXT: i32 42, label %bb6
+; CHECK-NEXT: i32 44, label %bb4
+; CHECK-NEXT: i32 45, label %bb3
+; CHECK-NEXT: i32 46, label %bb2
+; CHECK-NEXT: i32 47, label %bb1
+; CHECK-NEXT: i32 49, label %bb7
+; CHECK-NEXT: i32 50, label %bb6
+; CHECK-NEXT: i32 51, label %bb5
+; CHECK-NEXT: i32 52, label %bb4
+; CHECK-NEXT: i32 54, label %bb2
+; CHECK-NEXT: i32 55, label %bb1
+; CHECK-NEXT: i32 56, label %bb0
+; CHECK-NEXT: i32 57, label %bb7
+; CHECK-NEXT: i32 59, label %bb5
+; CHECK-NEXT: i32 60, label %bb4
+; CHECK-NEXT: i32 61, label %bb3
+; CHECK-NEXT: i32 62, label %bb2
+; CHECK-NEXT: i32 64, label %bb0
+; CHECK-NEXT: ]
+; CHECK: bb0:
+; CHECK-NEXT: br label %return
+; CHECK: bb1:
+; CHECK-NEXT: br label %return
+; CHECK: bb2:
+; CHECK-NEXT: br label %return
+; CHECK: bb3:
+; CHECK-NEXT: br label %return
+; CHECK: bb4:
+; CHECK-NEXT: br label %return
+; CHECK: bb5:
+; CHECK-NEXT: br label %return
+; CHECK: bb6:
+; CHECK-NEXT: br label %return
+; CHECK: bb7:
+; CHECK-NEXT: br label %return
+; CHECK: return:
+; CHECK-NEXT: %res = phi i32 [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ], [ %y, %entry ]
+; CHECK-NEXT: ret i32 %res
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 64, label %bb0
+ ]
+
+sw.default: br label %return
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ %y, %sw.default ], [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @unreachable_default_holes_0to64(i32 %x, i32 %y) {
+; CHECK-LABEL: @unreachable_default_holes_0to64(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: switch i32 %x, label %sw.default [
+; CHECK-NEXT: i32 0, label %return
+; CHECK-NEXT: i32 1, label %bb7
+; CHECK-NEXT: i32 2, label %bb6
+; CHECK-NEXT: i32 4, label %bb4
+; CHECK-NEXT: i32 5, label %bb3
+; CHECK-NEXT: i32 6, label %bb2
+; CHECK-NEXT: i32 7, label %bb1
+; CHECK-NEXT: i32 9, label %bb7
+; CHECK-NEXT: i32 10, label %bb6
+; CHECK-NEXT: i32 11, label %bb5
+; CHECK-NEXT: i32 12, label %bb4
+; CHECK-NEXT: i32 14, label %bb2
+; CHECK-NEXT: i32 15, label %bb1
+; CHECK-NEXT: i32 16, label %return
+; CHECK-NEXT: i32 17, label %bb7
+; CHECK-NEXT: i32 19, label %bb5
+; CHECK-NEXT: i32 20, label %bb4
+; CHECK-NEXT: i32 21, label %bb3
+; CHECK-NEXT: i32 22, label %bb2
+; CHECK-NEXT: i32 24, label %return
+; CHECK-NEXT: i32 25, label %bb7
+; CHECK-NEXT: i32 26, label %bb6
+; CHECK-NEXT: i32 27, label %bb5
+; CHECK-NEXT: i32 29, label %bb3
+; CHECK-NEXT: i32 30, label %bb2
+; CHECK-NEXT: i32 31, label %bb1
+; CHECK-NEXT: i32 32, label %return
+; CHECK-NEXT: i32 34, label %bb6
+; CHECK-NEXT: i32 35, label %bb5
+; CHECK-NEXT: i32 36, label %bb4
+; CHECK-NEXT: i32 37, label %bb3
+; CHECK-NEXT: i32 39, label %bb1
+; CHECK-NEXT: i32 40, label %return
+; CHECK-NEXT: i32 41, label %bb7
+; CHECK-NEXT: i32 42, label %bb6
+; CHECK-NEXT: i32 44, label %bb4
+; CHECK-NEXT: i32 45, label %bb3
+; CHECK-NEXT: i32 46, label %bb2
+; CHECK-NEXT: i32 47, label %bb1
+; CHECK-NEXT: i32 49, label %bb7
+; CHECK-NEXT: i32 50, label %bb6
+; CHECK-NEXT: i32 51, label %bb5
+; CHECK-NEXT: i32 52, label %bb4
+; CHECK-NEXT: i32 54, label %bb2
+; CHECK-NEXT: i32 55, label %bb1
+; CHECK-NEXT: i32 56, label %return
+; CHECK-NEXT: i32 57, label %bb7
+; CHECK-NEXT: i32 59, label %bb5
+; CHECK-NEXT: i32 60, label %bb4
+; CHECK-NEXT: i32 61, label %bb3
+; CHECK-NEXT: i32 62, label %bb2
+; CHECK-NEXT: i32 64, label %return
+; CHECK-NEXT: ]
+; CHECK: sw.default:
+; CHECK-NEXT: unreachable
+; CHECK: bb1:
+; CHECK-NEXT: br label %return
+; CHECK: bb2:
+; CHECK-NEXT: br label %return
+; CHECK: bb3:
+; CHECK-NEXT: br label %return
+; CHECK: bb4:
+; CHECK-NEXT: br label %return
+; CHECK: bb5:
+; CHECK-NEXT: br label %return
+; CHECK: bb6:
+; CHECK-NEXT: br label %return
+; CHECK: bb7:
+; CHECK-NEXT: br label %return
+; CHECK: return:
+; CHECK-NEXT: %res = phi i32 [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ]
+; CHECK-NEXT: ret i32 %res
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 64, label %bb0
+ ]
+
+sw.default: unreachable
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @reachable_default_dense_0to130(i32 %x, i32 %y) {
+; CHECK-LABEL: @reachable_default_dense_0to130(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %0 = icmp ult i32 %x, 131
+; CHECK-NEXT: br i1 %0, label %switch.lookup, label %return
+; CHECK: switch.lookup:
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [131 x i32], ptr @switch.table.reachable_default_dense_0to130, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: br label %return
+; CHECK: return:
+; CHECK-NEXT: %res = phi i32 [ %switch.load, %switch.lookup ], [ %y, %entry ]
+; CHECK-NEXT: ret i32 %res
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 3, label %bb5
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 8, label %bb0
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 13, label %bb3
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 18, label %bb6
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 23, label %bb1
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 28, label %bb4
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 33, label %bb7
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 38, label %bb2
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 43, label %bb5
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 48, label %bb0
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 53, label %bb3
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 58, label %bb6
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 63, label %bb1
+ i32 64, label %bb0
+ i32 65, label %bb7
+ i32 66, label %bb6
+ i32 67, label %bb5
+ i32 68, label %bb4
+ i32 69, label %bb3
+ i32 70, label %bb2
+ i32 71, label %bb1
+ i32 72, label %bb0
+ i32 73, label %bb7
+ i32 74, label %bb6
+ i32 75, label %bb5
+ i32 76, label %bb4
+ i32 77, label %bb3
+ i32 78, label %bb2
+ i32 79, label %bb1
+ i32 80, label %bb0
+ i32 81, label %bb7
+ i32 82, label %bb6
+ i32 83, label %bb5
+ i32 84, label %bb4
+ i32 85, label %bb3
+ i32 86, label %bb2
+ i32 87, label %bb1
+ i32 88, label %bb0
+ i32 89, label %bb7
+ i32 90, label %bb6
+ i32 91, label %bb5
+ i32 92, label %bb4
+ i32 93, label %bb3
+ i32 94, label %bb2
+ i32 95, label %bb1
+ i32 96, label %bb0
+ i32 97, label %bb7
+ i32 98, label %bb6
+ i32 99, label %bb5
+ i32 100, label %bb4
+ i32 101, label %bb3
+ i32 102, label %bb2
+ i32 103, label %bb1
+ i32 104, label %bb0
+ i32 105, label %bb7
+ i32 106, label %bb6
+ i32 107, label %bb5
+ i32 108, label %bb4
+ i32 109, label %bb3
+ i32 110, label %bb2
+ i32 111, label %bb1
+ i32 112, label %bb0
+ i32 113, label %bb7
+ i32 114, label %bb6
+ i32 115, label %bb5
+ i32 116, label %bb4
+ i32 117, label %bb3
+ i32 118, label %bb2
+ i32 119, label %bb1
+ i32 120, label %bb0
+ i32 121, label %bb7
+ i32 122, label %bb6
+ i32 123, label %bb5
+ i32 124, label %bb4
+ i32 125, label %bb3
+ i32 126, label %bb2
+ i32 127, label %bb1
+ i32 128, label %bb0
+ i32 129, label %bb7
+ i32 130, label %bb6
+ ]
+
+sw.default: br label %return
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ %y, %sw.default ], [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @unreachable_default_dense_0to130(i32 %x, i32 %y) {
+; CHECK-LABEL: @unreachable_default_dense_0to130(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [131 x i32], ptr @switch.table.unreachable_default_dense_0to130, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: ret i32 %switch.load
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 3, label %bb5
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 8, label %bb0
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 13, label %bb3
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 18, label %bb6
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 23, label %bb1
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 28, label %bb4
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 33, label %bb7
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 38, label %bb2
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 43, label %bb5
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 48, label %bb0
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 53, label %bb3
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 58, label %bb6
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 63, label %bb1
+ i32 64, label %bb0
+ i32 65, label %bb7
+ i32 66, label %bb6
+ i32 67, label %bb5
+ i32 68, label %bb4
+ i32 69, label %bb3
+ i32 70, label %bb2
+ i32 71, label %bb1
+ i32 72, label %bb0
+ i32 73, label %bb7
+ i32 74, label %bb6
+ i32 75, label %bb5
+ i32 76, label %bb4
+ i32 77, label %bb3
+ i32 78, label %bb2
+ i32 79, label %bb1
+ i32 80, label %bb0
+ i32 81, label %bb7
+ i32 82, label %bb6
+ i32 83, label %bb5
+ i32 84, label %bb4
+ i32 85, label %bb3
+ i32 86, label %bb2
+ i32 87, label %bb1
+ i32 88, label %bb0
+ i32 89, label %bb7
+ i32 90, label %bb6
+ i32 91, label %bb5
+ i32 92, label %bb4
+ i32 93, label %bb3
+ i32 94, label %bb2
+ i32 95, label %bb1
+ i32 96, label %bb0
+ i32 97, label %bb7
+ i32 98, label %bb6
+ i32 99, label %bb5
+ i32 100, label %bb4
+ i32 101, label %bb3
+ i32 102, label %bb2
+ i32 103, label %bb1
+ i32 104, label %bb0
+ i32 105, label %bb7
+ i32 106, label %bb6
+ i32 107, label %bb5
+ i32 108, label %bb4
+ i32 109, label %bb3
+ i32 110, label %bb2
+ i32 111, label %bb1
+ i32 112, label %bb0
+ i32 113, label %bb7
+ i32 114, label %bb6
+ i32 115, label %bb5
+ i32 116, label %bb4
+ i32 117, label %bb3
+ i32 118, label %bb2
+ i32 119, label %bb1
+ i32 120, label %bb0
+ i32 121, label %bb7
+ i32 122, label %bb6
+ i32 123, label %bb5
+ i32 124, label %bb4
+ i32 125, label %bb3
+ i32 126, label %bb2
+ i32 127, label %bb1
+ i32 128, label %bb0
+ i32 129, label %bb7
+ i32 130, label %bb6
+ ]
+
+sw.default: unreachable
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @reachable_default_holes_0to130(i32 %x, i32 %y) {
+; CHECK-LABEL: @reachable_default_holes_0to130(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: switch i32 %x, label %return [
+; CHECK-NEXT: i32 0, label %bb0
+; CHECK-NEXT: i32 1, label %bb7
+; CHECK-NEXT: i32 2, label %bb6
+; CHECK-NEXT: i32 4, label %bb4
+; CHECK-NEXT: i32 5, label %bb3
+; CHECK-NEXT: i32 6, label %bb2
+; CHECK-NEXT: i32 7, label %bb1
+; CHECK-NEXT: i32 9, label %bb7
+; CHECK-NEXT: i32 10, label %bb6
+; CHECK-NEXT: i32 11, label %bb5
+; CHECK-NEXT: i32 12, label %bb4
+; CHECK-NEXT: i32 14, label %bb2
+; CHECK-NEXT: i32 15, label %bb1
+; CHECK-NEXT: i32 16, label %bb0
+; CHECK-NEXT: i32 17, label %bb7
+; CHECK-NEXT: i32 19, label %bb5
+; CHECK-NEXT: i32 20, label %bb4
+; CHECK-NEXT: i32 21, label %bb3
+; CHECK-NEXT: i32 22, label %bb2
+; CHECK-NEXT: i32 24, label %bb0
+; CHECK-NEXT: i32 25, label %bb7
+; CHECK-NEXT: i32 26, label %bb6
+; CHECK-NEXT: i32 27, label %bb5
+; CHECK-NEXT: i32 29, label %bb3
+; CHECK-NEXT: i32 30, label %bb2
+; CHECK-NEXT: i32 31, label %bb1
+; CHECK-NEXT: i32 32, label %bb0
+; CHECK-NEXT: i32 34, label %bb6
+; CHECK-NEXT: i32 35, label %bb5
+; CHECK-NEXT: i32 36, label %bb4
+; CHECK-NEXT: i32 37, label %bb3
+; CHECK-NEXT: i32 39, label %bb1
+; CHECK-NEXT: i32 40, label %bb0
+; CHECK-NEXT: i32 41, label %bb7
+; CHECK-NEXT: i32 42, label %bb6
+; CHECK-NEXT: i32 44, label %bb4
+; CHECK-NEXT: i32 45, label %bb3
+; CHECK-NEXT: i32 46, label %bb2
+; CHECK-NEXT: i32 47, label %bb1
+; CHECK-NEXT: i32 49, label %bb7
+; CHECK-NEXT: i32 50, label %bb6
+; CHECK-NEXT: i32 51, label %bb5
+; CHECK-NEXT: i32 52, label %bb4
+; CHECK-NEXT: i32 54, label %bb2
+; CHECK-NEXT: i32 55, label %bb1
+; CHECK-NEXT: i32 56, label %bb0
+; CHECK-NEXT: i32 57, label %bb7
+; CHECK-NEXT: i32 59, label %bb5
+; CHECK-NEXT: i32 60, label %bb4
+; CHECK-NEXT: i32 61, label %bb3
+; CHECK-NEXT: i32 62, label %bb2
+; CHECK-NEXT: i32 64, label %bb0
+; CHECK-NEXT: i32 65, label %bb7
+; CHECK-NEXT: i32 66, label %bb6
+; CHECK-NEXT: i32 67, label %bb5
+; CHECK-NEXT: i32 69, label %bb3
+; CHECK-NEXT: i32 70, label %bb2
+; CHECK-NEXT: i32 71, label %bb1
+; CHECK-NEXT: i32 72, label %bb0
+; CHECK-NEXT: i32 74, label %bb6
+; CHECK-NEXT: i32 75, label %bb5
+; CHECK-NEXT: i32 76, label %bb4
+; CHECK-NEXT: i32 77, label %bb3
+; CHECK-NEXT: i32 79, label %bb1
+; CHECK-NEXT: i32 80, label %bb0
+; CHECK-NEXT: i32 81, label %bb7
+; CHECK-NEXT: i32 82, label %bb6
+; CHECK-NEXT: i32 84, label %bb4
+; CHECK-NEXT: i32 85, label %bb3
+; CHECK-NEXT: i32 86, label %bb2
+; CHECK-NEXT: i32 87, label %bb1
+; CHECK-NEXT: i32 89, label %bb7
+; CHECK-NEXT: i32 90, label %bb6
+; CHECK-NEXT: i32 91, label %bb5
+; CHECK-NEXT: i32 92, label %bb4
+; CHECK-NEXT: i32 94, label %bb2
+; CHECK-NEXT: i32 95, label %bb1
+; CHECK-NEXT: i32 97, label %bb7
+; CHECK-NEXT: i32 99, label %bb5
+; CHECK-NEXT: i32 100, label %bb4
+; CHECK-NEXT: i32 101, label %bb3
+; CHECK-NEXT: i32 102, label %bb2
+; CHECK-NEXT: i32 104, label %bb0
+; CHECK-NEXT: i32 105, label %bb7
+; CHECK-NEXT: i32 106, label %bb6
+; CHECK-NEXT: i32 107, label %bb5
+; CHECK-NEXT: i32 109, label %bb3
+; CHECK-NEXT: i32 110, label %bb2
+; CHECK-NEXT: i32 111, label %bb1
+; CHECK-NEXT: i32 112, label %bb0
+; CHECK-NEXT: i32 114, label %bb6
+; CHECK-NEXT: i32 115, label %bb5
+; CHECK-NEXT: i32 117, label %bb3
+; CHECK-NEXT: i32 119, label %bb1
+; CHECK-NEXT: i32 120, label %bb0
+; CHECK-NEXT: i32 122, label %bb6
+; CHECK-NEXT: i32 124, label %bb4
+; CHECK-NEXT: i32 125, label %bb3
+; CHECK-NEXT: i32 127, label %bb1
+; CHECK-NEXT: i32 129, label %bb7
+; CHECK-NEXT: i32 130, label %bb6
+; CHECK-NEXT: ]
+; CHECK: bb0:
+; CHECK-NEXT: br label %return
+; CHECK: bb1:
+; CHECK-NEXT: br label %return
+; CHECK: bb2:
+; CHECK-NEXT: br label %return
+; CHECK: bb3:
+; CHECK-NEXT: br label %return
+; CHECK: bb4:
+; CHECK-NEXT: br label %return
+; CHECK: bb5:
+; CHECK-NEXT: br label %return
+; CHECK: bb6:
+; CHECK-NEXT: br label %return
+; CHECK: bb7:
+; CHECK-NEXT: br label %return
+; CHECK: return:
+; CHECK-NEXT: %res = phi i32 [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ], [ %y, %entry ]
+; CHECK-NEXT: ret i32 %res
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 64, label %bb0
+ i32 65, label %bb7
+ i32 66, label %bb6
+ i32 67, label %bb5
+ i32 69, label %bb3
+ i32 70, label %bb2
+ i32 71, label %bb1
+ i32 72, label %bb0
+ i32 74, label %bb6
+ i32 75, label %bb5
+ i32 76, label %bb4
+ i32 77, label %bb3
+ i32 79, label %bb1
+ i32 80, label %bb0
+ i32 81, label %bb7
+ i32 82, label %bb6
+ i32 84, label %bb4
+ i32 85, label %bb3
+ i32 86, label %bb2
+ i32 87, label %bb1
+ i32 89, label %bb7
+ i32 90, label %bb6
+ i32 91, label %bb5
+ i32 92, label %bb4
+ i32 94, label %bb2
+ i32 95, label %bb1
+ i32 97, label %bb7
+ i32 99, label %bb5
+ i32 100, label %bb4
+ i32 101, label %bb3
+ i32 102, label %bb2
+ i32 104, label %bb0
+ i32 105, label %bb7
+ i32 106, label %bb6
+ i32 107, label %bb5
+ i32 109, label %bb3
+ i32 110, label %bb2
+ i32 111, label %bb1
+ i32 112, label %bb0
+ i32 114, label %bb6
+ i32 115, label %bb5
+ i32 117, label %bb3
+ i32 119, label %bb1
+ i32 120, label %bb0
+ i32 122, label %bb6
+ i32 124, label %bb4
+ i32 125, label %bb3
+ i32 127, label %bb1
+ i32 129, label %bb7
+ i32 130, label %bb6
+ ]
+
+sw.default: br label %return
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ %y, %sw.default ], [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+
+define i32 @unreachable_default_holes_0to130(i32 %x, i32 %y) {
+; CHECK-LABEL: @unreachable_default_holes_0to130(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: switch i32 %x, label %sw.default [
+; CHECK-NEXT: i32 0, label %return
+; CHECK-NEXT: i32 1, label %bb7
+; CHECK-NEXT: i32 2, label %bb6
+; CHECK-NEXT: i32 4, label %bb4
+; CHECK-NEXT: i32 5, label %bb3
+; CHECK-NEXT: i32 6, label %bb2
+; CHECK-NEXT: i32 7, label %bb1
+; CHECK-NEXT: i32 9, label %bb7
+; CHECK-NEXT: i32 10, label %bb6
+; CHECK-NEXT: i32 11, label %bb5
+; CHECK-NEXT: i32 12, label %bb4
+; CHECK-NEXT: i32 14, label %bb2
+; CHECK-NEXT: i32 15, label %bb1
+; CHECK-NEXT: i32 16, label %return
+; CHECK-NEXT: i32 17, label %bb7
+; CHECK-NEXT: i32 19, label %bb5
+; CHECK-NEXT: i32 20, label %bb4
+; CHECK-NEXT: i32 21, label %bb3
+; CHECK-NEXT: i32 22, label %bb2
+; CHECK-NEXT: i32 24, label %return
+; CHECK-NEXT: i32 25, label %bb7
+; CHECK-NEXT: i32 26, label %bb6
+; CHECK-NEXT: i32 27, label %bb5
+; CHECK-NEXT: i32 29, label %bb3
+; CHECK-NEXT: i32 30, label %bb2
+; CHECK-NEXT: i32 31, label %bb1
+; CHECK-NEXT: i32 32, label %return
+; CHECK-NEXT: i32 34, label %bb6
+; CHECK-NEXT: i32 35, label %bb5
+; CHECK-NEXT: i32 36, label %bb4
+; CHECK-NEXT: i32 37, label %bb3
+; CHECK-NEXT: i32 39, label %bb1
+; CHECK-NEXT: i32 40, label %return
+; CHECK-NEXT: i32 41, label %bb7
+; CHECK-NEXT: i32 42, label %bb6
+; CHECK-NEXT: i32 44, label %bb4
+; CHECK-NEXT: i32 45, label %bb3
+; CHECK-NEXT: i32 46, label %bb2
+; CHECK-NEXT: i32 47, label %bb1
+; CHECK-NEXT: i32 49, label %bb7
+; CHECK-NEXT: i32 50, label %bb6
+; CHECK-NEXT: i32 51, label %bb5
+; CHECK-NEXT: i32 52, label %bb4
+; CHECK-NEXT: i32 54, label %bb2
+; CHECK-NEXT: i32 55, label %bb1
+; CHECK-NEXT: i32 56, label %return
+; CHECK-NEXT: i32 57, label %bb7
+; CHECK-NEXT: i32 59, label %bb5
+; CHECK-NEXT: i32 60, label %bb4
+; CHECK-NEXT: i32 61, label %bb3
+; CHECK-NEXT: i32 62, label %bb2
+; CHECK-NEXT: i32 64, label %return
+; CHECK-NEXT: i32 65, label %bb7
+; CHECK-NEXT: i32 66, label %bb6
+; CHECK-NEXT: i32 67, label %bb5
+; CHECK-NEXT: i32 69, label %bb3
+; CHECK-NEXT: i32 70, label %bb2
+; CHECK-NEXT: i32 71, label %bb1
+; CHECK-NEXT: i32 72, label %return
+; CHECK-NEXT: i32 74, label %bb6
+; CHECK-NEXT: i32 75, label %bb5
+; CHECK-NEXT: i32 76, label %bb4
+; CHECK-NEXT: i32 77, label %bb3
+; CHECK-NEXT: i32 79, label %bb1
+; CHECK-NEXT: i32 80, label %return
+; CHECK-NEXT: i32 81, label %bb7
+; CHECK-NEXT: i32 82, label %bb6
+; CHECK-NEXT: i32 84, label %bb4
+; CHECK-NEXT: i32 85, label %bb3
+; CHECK-NEXT: i32 86, label %bb2
+; CHECK-NEXT: i32 87, label %bb1
+; CHECK-NEXT: i32 89, label %bb7
+; CHECK-NEXT: i32 90, label %bb6
+; CHECK-NEXT: i32 91, label %bb5
+; CHECK-NEXT: i32 92, label %bb4
+; CHECK-NEXT: i32 94, label %bb2
+; CHECK-NEXT: i32 95, label %bb1
+; CHECK-NEXT: i32 97, label %bb7
+; CHECK-NEXT: i32 99, label %bb5
+; CHECK-NEXT: i32 100, label %bb4
+; CHECK-NEXT: i32 101, label %bb3
+; CHECK-NEXT: i32 102, label %bb2
+; CHECK-NEXT: i32 104, label %return
+; CHECK-NEXT: i32 105, label %bb7
+; CHECK-NEXT: i32 106, label %bb6
+; CHECK-NEXT: i32 107, label %bb5
+; CHECK-NEXT: i32 109, label %bb3
+; CHECK-NEXT: i32 110, label %bb2
+; CHECK-NEXT: i32 111, label %bb1
+; CHECK-NEXT: i32 112, label %return
+; CHECK-NEXT: i32 114, label %bb6
+; CHECK-NEXT: i32 115, label %bb5
+; CHECK-NEXT: i32 117, label %bb3
+; CHECK-NEXT: i32 119, label %bb1
+; CHECK-NEXT: i32 120, label %return
+; CHECK-NEXT: i32 122, label %bb6
+; CHECK-NEXT: i32 124, label %bb4
+; CHECK-NEXT: i32 125, label %bb3
+; CHECK-NEXT: i32 127, label %bb1
+; CHECK-NEXT: i32 129, label %bb7
+; CHECK-NEXT: i32 130, label %bb6
+; CHECK-NEXT: ]
+; CHECK: sw.default:
+; CHECK-NEXT: unreachable
+; CHECK: bb1:
+; CHECK-NEXT: br label %return
+; CHECK: bb2:
+; CHECK-NEXT: br label %return
+; CHECK: bb3:
+; CHECK-NEXT: br label %return
+; CHECK: bb4:
+; CHECK-NEXT: br label %return
+; CHECK: bb5:
+; CHECK-NEXT: br label %return
+; CHECK: bb6:
+; CHECK-NEXT: br label %return
+; CHECK: bb7:
+; CHECK-NEXT: br label %return
+; CHECK: return:
+; CHECK-NEXT: %res = phi i32 [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ]
+; CHECK-NEXT: ret i32 %res
+;
+entry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %bb0
+ i32 1, label %bb7
+ i32 2, label %bb6
+ i32 4, label %bb4
+ i32 5, label %bb3
+ i32 6, label %bb2
+ i32 7, label %bb1
+ i32 9, label %bb7
+ i32 10, label %bb6
+ i32 11, label %bb5
+ i32 12, label %bb4
+ i32 14, label %bb2
+ i32 15, label %bb1
+ i32 16, label %bb0
+ i32 17, label %bb7
+ i32 19, label %bb5
+ i32 20, label %bb4
+ i32 21, label %bb3
+ i32 22, label %bb2
+ i32 24, label %bb0
+ i32 25, label %bb7
+ i32 26, label %bb6
+ i32 27, label %bb5
+ i32 29, label %bb3
+ i32 30, label %bb2
+ i32 31, label %bb1
+ i32 32, label %bb0
+ i32 34, label %bb6
+ i32 35, label %bb5
+ i32 36, label %bb4
+ i32 37, label %bb3
+ i32 39, label %bb1
+ i32 40, label %bb0
+ i32 41, label %bb7
+ i32 42, label %bb6
+ i32 44, label %bb4
+ i32 45, label %bb3
+ i32 46, label %bb2
+ i32 47, label %bb1
+ i32 49, label %bb7
+ i32 50, label %bb6
+ i32 51, label %bb5
+ i32 52, label %bb4
+ i32 54, label %bb2
+ i32 55, label %bb1
+ i32 56, label %bb0
+ i32 57, label %bb7
+ i32 59, label %bb5
+ i32 60, label %bb4
+ i32 61, label %bb3
+ i32 62, label %bb2
+ i32 64, label %bb0
+ i32 65, label %bb7
+ i32 66, label %bb6
+ i32 67, label %bb5
+ i32 69, label %bb3
+ i32 70, label %bb2
+ i32 71, label %bb1
+ i32 72, label %bb0
+ i32 74, label %bb6
+ i32 75, label %bb5
+ i32 76, label %bb4
+ i32 77, label %bb3
+ i32 79, label %bb1
+ i32 80, label %bb0
+ i32 81, label %bb7
+ i32 82, label %bb6
+ i32 84, label %bb4
+ i32 85, label %bb3
+ i32 86, label %bb2
+ i32 87, label %bb1
+ i32 89, label %bb7
+ i32 90, label %bb6
+ i32 91, label %bb5
+ i32 92, label %bb4
+ i32 94, label %bb2
+ i32 95, label %bb1
+ i32 97, label %bb7
+ i32 99, label %bb5
+ i32 100, label %bb4
+ i32 101, label %bb3
+ i32 102, label %bb2
+ i32 104, label %bb0
+ i32 105, label %bb7
+ i32 106, label %bb6
+ i32 107, label %bb5
+ i32 109, label %bb3
+ i32 110, label %bb2
+ i32 111, label %bb1
+ i32 112, label %bb0
+ i32 114, label %bb6
+ i32 115, label %bb5
+ i32 117, label %bb3
+ i32 119, label %bb1
+ i32 120, label %bb0
+ i32 122, label %bb6
+ i32 124, label %bb4
+ i32 125, label %bb3
+ i32 127, label %bb1
+ i32 129, label %bb7
+ i32 130, label %bb6
+ ]
+
+sw.default: unreachable
+bb0: br label %return
+bb1: br label %return
+bb2: br label %return
+bb3: br label %return
+bb4: br label %return
+bb5: br label %return
+bb6: br label %return
+bb7: br label %return
+
+return:
+ %res = phi i32 [ 0, %bb0 ], [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ]
+ ret i32 %res
+
+}
+;.
+; CHECK: attributes #0 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
+;.
>From 05f6be0b2bbc338fdb2f8247b59e1db5cce2d886 Mon Sep 17 00:00:00 2001
From: DaPorkchop_ <daporkchop at daporkchop.net>
Date: Wed, 5 Jun 2024 14:50:56 +0200
Subject: [PATCH 2/2] [SimplifyCFG] Don't use a mask when converting a switch
with an unreachable default branch to a lookup table
This make it possible to convert large switches (whose lookup table size would exceed the target register bit width) with holes and an unreachable default case into lookup tables.
---
llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 19 +-
.../RISCV/switch-of-powers-of-two.ll | 4 -
.../SimplifyCFG/X86/switch_to_lookup_table.ll | 19 +-
.../X86/switch_to_lookup_table_big.ll | 229 ++----------------
4 files changed, 41 insertions(+), 230 deletions(-)
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index fe6ec8819ff99..2c0238e198070 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -6743,8 +6743,14 @@ static bool SwitchToLookupTable(SwitchInst *SI, IRBuilder<> &Builder,
TableSize =
(MaxCaseVal->getValue() - MinCaseVal->getValue()).getLimitedValue() + 1;
+ // If the default destination is unreachable, or if the lookup table covers
+ // all values of the conditional variable, branch directly to the lookup table
+ // BB. Otherwise, check that the condition is within the case range.
+ bool DefaultIsReachable = !SI->defaultDestUndefined();
+
bool TableHasHoles = (NumResults < TableSize);
- bool NeedMask = (TableHasHoles && !HasDefaultResults);
+ bool HolesHaveUndefinedResults = (TableHasHoles && !HasDefaultResults);
+ bool NeedMask = (HolesHaveUndefinedResults && DefaultIsReachable);
if (NeedMask) {
// As an extra penalty for the validity test we require more cases.
if (SI->getNumCases() < 4) // FIXME: Find best threshold value (benchmark).
@@ -6766,12 +6772,6 @@ static bool SwitchToLookupTable(SwitchInst *SI, IRBuilder<> &Builder,
"It is impossible for a switch to have more entries than the max "
"representable value of its input integer type's size.");
- // If the default destination is unreachable, or if the lookup table covers
- // all values of the conditional variable, branch directly to the lookup table
- // BB. Otherwise, check that the condition is within the case range.
- bool DefaultIsReachable =
- !isa<UnreachableInst>(SI->getDefaultDest()->getFirstNonPHIOrDbg());
-
// Create the BB that does the lookups.
Module &Mod = *CommonDest->getParent()->getParent();
BasicBlock *LookupBB = BasicBlock::Create(
@@ -6895,8 +6895,9 @@ static bool SwitchToLookupTable(SwitchInst *SI, IRBuilder<> &Builder,
for (PHINode *PHI : PHIs) {
const ResultListTy &ResultList = ResultLists[PHI];
- // If using a bitmask, use any value to fill the lookup table holes.
- Constant *DV = NeedMask ? ResultLists[PHI][0].second : DefaultResults[PHI];
+ // Use any value to fill the lookup table holes.
+ Constant *DV = HolesHaveUndefinedResults ? ResultLists[PHI][0].second
+ : DefaultResults[PHI];
StringRef FuncName = Fn->getName();
SwitchLookupTable Table(Mod, TableSize, TableIndexOffset, ResultList, DV,
DL, FuncName);
diff --git a/llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll b/llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll
index 3ded78d85a610..2ac94afd95910 100644
--- a/llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll
+++ b/llvm/test/Transforms/SimplifyCFG/RISCV/switch-of-powers-of-two.ll
@@ -34,10 +34,6 @@ define i32 @switch_of_powers(i32 %x) {
; RV64ZBB-LABEL: @switch_of_powers(
; RV64ZBB-NEXT: entry:
; RV64ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
-; RV64ZBB-NEXT: [[SWITCH_MASKINDEX:%.*]] = trunc i32 [[TMP0]] to i8
-; RV64ZBB-NEXT: [[SWITCH_SHIFTED:%.*]] = lshr i8 121, [[SWITCH_MASKINDEX]]
-; RV64ZBB-NEXT: [[SWITCH_LOBIT:%.*]] = trunc i8 [[SWITCH_SHIFTED]] to i1
-; RV64ZBB-NEXT: call void @llvm.assume(i1 [[SWITCH_LOBIT]])
; RV64ZBB-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [7 x i32], ptr @switch.table.switch_of_powers, i32 0, i32 [[TMP0]]
; RV64ZBB-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
; RV64ZBB-NEXT: ret i32 [[SWITCH_LOAD]]
diff --git a/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll b/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
index 9d18bb15bce8e..dae797068e409 100644
--- a/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
+++ b/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
@@ -1732,20 +1732,11 @@ define i32 @signed_overflow2(i8 %n) {
; CHECK-LABEL: @signed_overflow2(
; CHECK-NEXT: start:
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i8 [[N:%.*]] to i2
-; CHECK-NEXT: switch i2 [[TRUNC]], label [[BB1:%.*]] [
-; CHECK-NEXT: i2 1, label [[BB6:%.*]]
-; CHECK-NEXT: i2 -2, label [[BB4:%.*]]
-; CHECK-NEXT: i2 -1, label [[BB5:%.*]]
-; CHECK-NEXT: ]
-; CHECK: bb1:
-; CHECK-NEXT: unreachable
-; CHECK: bb4:
-; CHECK-NEXT: br label [[BB6]]
-; CHECK: bb5:
-; CHECK-NEXT: br label [[BB6]]
-; CHECK: bb6:
-; CHECK-NEXT: [[DOTSROA_0_0:%.*]] = phi i32 [ 4444, [[BB5]] ], [ 3333, [[BB4]] ], [ 2222, [[START:%.*]] ]
-; CHECK-NEXT: ret i32 [[DOTSROA_0_0]]
+; CHECK-NEXT: [[SWITCH_TABLEIDX:%.*]] = sub i2 [[TRUNC]], -2
+; CHECK-NEXT: [[SWITCH_TABLEIDX_ZEXT:%.*]] = zext i2 [[SWITCH_TABLEIDX]] to i3
+; CHECK-NEXT: [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], ptr @switch.table.signed_overflow2, i32 0, i3 [[SWITCH_TABLEIDX_ZEXT]]
+; CHECK-NEXT: [[SWITCH_LOAD:%.*]] = load i32, ptr [[SWITCH_GEP]], align 4
+; CHECK-NEXT: ret i32 [[SWITCH_LOAD]]
;
start:
%trunc = trunc i8 %n to i2
diff --git a/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll b/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll
index cfa65720b9114..349436bc4c1f1 100644
--- a/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll
+++ b/llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table_big.ll
@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: -p --check-globals
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
; RUN: opt < %s -passes=simplifycfg -switch-to-lookup=true -keep-loops=false -S -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; RUN: opt < %s -passes='simplifycfg<no-keep-loops;switch-to-lookup>' -S -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i32:8:8-i16:16:16-i32:32:32-i32:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
@@ -11,9 +11,13 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @switch.table.unreachable_default_holes_0to63 = private unnamed_addr constant [64 x i32] [i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 5, i32 0, i32 3, i32 2, i32 1, i32 0, i32 0, i32 6, i32 5, i32 4, i32 3, i32 0, i32 1, i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 1], align 8
; CHECK: @switch.table.reachable_default_dense_0to64 = private unnamed_addr constant [65 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0], align 8
; CHECK: @switch.table.unreachable_default_dense_0to64 = private unnamed_addr constant [65 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0], align 8
+; CHECK: @switch.table.unreachable_default_holes_0to64 = private unnamed_addr constant [65 x i32] [i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 5, i32 0, i32 3, i32 2, i32 1, i32 0, i32 0, i32 6, i32 5, i32 4, i32 3, i32 0, i32 1, i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 0, i32 0], align 8
; CHECK: @switch.table.reachable_default_dense_0to130 = private unnamed_addr constant [131 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6], align 8
; CHECK: @switch.table.unreachable_default_dense_0to130 = private unnamed_addr constant [131 x i32] [i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6], align 8
+; CHECK: @switch.table.unreachable_default_holes_0to130 = private unnamed_addr constant [131 x i32] [i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 5, i32 0, i32 3, i32 2, i32 1, i32 0, i32 0, i32 6, i32 5, i32 4, i32 3, i32 0, i32 1, i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 5, i32 0, i32 3, i32 2, i32 1, i32 0, i32 0, i32 6, i32 5, i32 4, i32 3, i32 0, i32 1, i32 0, i32 7, i32 6, i32 0, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 0, i32 2, i32 1, i32 0, i32 7, i32 0, i32 5, i32 4, i32 3, i32 2, i32 0, i32 0, i32 7, i32 6, i32 5, i32 0, i32 3, i32 2, i32 1, i32 0, i32 0, i32 6, i32 5, i32 0, i32 3, i32 0, i32 1, i32 0, i32 0, i32 6, i32 0, i32 4, i32 3, i32 0, i32 1, i32 0, i32 7, i32 6], align 8
;.
+
+; A dense switch with a reachable default case should be optimized into a lookup table with a bounds check
define i32 @reachable_default_dense_0to63(i32 %x, i32 %y) {
; CHECK-LABEL: @reachable_default_dense_0to63(
; CHECK-NEXT: entry:
@@ -111,6 +115,7 @@ return:
}
+; A dense switch with an unreachable default case should be optimized into a lookup table without bounds checks
define i32 @unreachable_default_dense_0to63(i32 %x, i32 %y) {
; CHECK-LABEL: @unreachable_default_dense_0to63(
; CHECK-NEXT: entry:
@@ -202,6 +207,7 @@ return:
}
+; A sparse switch with a reachable default case should be optimized into a lookup table with a bounds check and a mask
define i32 @reachable_default_holes_0to63(i32 %x, i32 %y) {
; CHECK-LABEL: @reachable_default_holes_0to63(
; CHECK-NEXT: entry:
@@ -292,13 +298,10 @@ return:
}
+; A sparse switch with an unreachable default case should be optimized into a lookup table without bounds checks
define i32 @unreachable_default_holes_0to63(i32 %x, i32 %y) {
; CHECK-LABEL: @unreachable_default_holes_0to63(
; CHECK-NEXT: entry:
-; CHECK-NEXT: %switch.maskindex = zext i32 %x to i64
-; CHECK-NEXT: %switch.shifted = lshr i64 -297528130221121801, %switch.maskindex
-; CHECK-NEXT: %switch.lobit = trunc i64 %switch.shifted to i1
-; CHECK-NEXT: call void @llvm.assume(i1 %switch.lobit)
; CHECK-NEXT: %switch.gep = getelementptr inbounds [64 x i32], ptr @switch.table.unreachable_default_holes_0to63, i32 0, i32 %x
; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
; CHECK-NEXT: ret i32 %switch.load
@@ -375,6 +378,7 @@ return:
}
+; A dense switch with a reachable default case should be optimized into a lookup table with a bounds check
define i32 @reachable_default_dense_0to64(i32 %x, i32 %y) {
; CHECK-LABEL: @reachable_default_dense_0to64(
; CHECK-NEXT: entry:
@@ -473,6 +477,7 @@ return:
}
+; A dense switch with an unreachable default case should be optimized into a lookup table without bounds checks
define i32 @unreachable_default_dense_0to64(i32 %x, i32 %y) {
; CHECK-LABEL: @unreachable_default_dense_0to64(
; CHECK-NEXT: entry:
@@ -565,6 +570,8 @@ return:
}
+; A sparse switch with a reachable default case which would be optimized into a lookup table with a bounds check and a mask, but doesn't because
+; it would require a 65-bit mask
define i32 @reachable_default_holes_0to64(i32 %x, i32 %y) {
; CHECK-LABEL: @reachable_default_holes_0to64(
; CHECK-NEXT: entry:
@@ -714,82 +721,14 @@ return:
}
+; A sparse switch with an unreachable default case which can be optimized into a lookup table without bounds checks. Because the default case is
+; unreachable, the fact that a 65-bit mask would be required doesn't prevent lookup table optimization.
define i32 @unreachable_default_holes_0to64(i32 %x, i32 %y) {
; CHECK-LABEL: @unreachable_default_holes_0to64(
; CHECK-NEXT: entry:
-; CHECK-NEXT: switch i32 %x, label %sw.default [
-; CHECK-NEXT: i32 0, label %return
-; CHECK-NEXT: i32 1, label %bb7
-; CHECK-NEXT: i32 2, label %bb6
-; CHECK-NEXT: i32 4, label %bb4
-; CHECK-NEXT: i32 5, label %bb3
-; CHECK-NEXT: i32 6, label %bb2
-; CHECK-NEXT: i32 7, label %bb1
-; CHECK-NEXT: i32 9, label %bb7
-; CHECK-NEXT: i32 10, label %bb6
-; CHECK-NEXT: i32 11, label %bb5
-; CHECK-NEXT: i32 12, label %bb4
-; CHECK-NEXT: i32 14, label %bb2
-; CHECK-NEXT: i32 15, label %bb1
-; CHECK-NEXT: i32 16, label %return
-; CHECK-NEXT: i32 17, label %bb7
-; CHECK-NEXT: i32 19, label %bb5
-; CHECK-NEXT: i32 20, label %bb4
-; CHECK-NEXT: i32 21, label %bb3
-; CHECK-NEXT: i32 22, label %bb2
-; CHECK-NEXT: i32 24, label %return
-; CHECK-NEXT: i32 25, label %bb7
-; CHECK-NEXT: i32 26, label %bb6
-; CHECK-NEXT: i32 27, label %bb5
-; CHECK-NEXT: i32 29, label %bb3
-; CHECK-NEXT: i32 30, label %bb2
-; CHECK-NEXT: i32 31, label %bb1
-; CHECK-NEXT: i32 32, label %return
-; CHECK-NEXT: i32 34, label %bb6
-; CHECK-NEXT: i32 35, label %bb5
-; CHECK-NEXT: i32 36, label %bb4
-; CHECK-NEXT: i32 37, label %bb3
-; CHECK-NEXT: i32 39, label %bb1
-; CHECK-NEXT: i32 40, label %return
-; CHECK-NEXT: i32 41, label %bb7
-; CHECK-NEXT: i32 42, label %bb6
-; CHECK-NEXT: i32 44, label %bb4
-; CHECK-NEXT: i32 45, label %bb3
-; CHECK-NEXT: i32 46, label %bb2
-; CHECK-NEXT: i32 47, label %bb1
-; CHECK-NEXT: i32 49, label %bb7
-; CHECK-NEXT: i32 50, label %bb6
-; CHECK-NEXT: i32 51, label %bb5
-; CHECK-NEXT: i32 52, label %bb4
-; CHECK-NEXT: i32 54, label %bb2
-; CHECK-NEXT: i32 55, label %bb1
-; CHECK-NEXT: i32 56, label %return
-; CHECK-NEXT: i32 57, label %bb7
-; CHECK-NEXT: i32 59, label %bb5
-; CHECK-NEXT: i32 60, label %bb4
-; CHECK-NEXT: i32 61, label %bb3
-; CHECK-NEXT: i32 62, label %bb2
-; CHECK-NEXT: i32 64, label %return
-; CHECK-NEXT: ]
-; CHECK: sw.default:
-; CHECK-NEXT: unreachable
-; CHECK: bb1:
-; CHECK-NEXT: br label %return
-; CHECK: bb2:
-; CHECK-NEXT: br label %return
-; CHECK: bb3:
-; CHECK-NEXT: br label %return
-; CHECK: bb4:
-; CHECK-NEXT: br label %return
-; CHECK: bb5:
-; CHECK-NEXT: br label %return
-; CHECK: bb6:
-; CHECK-NEXT: br label %return
-; CHECK: bb7:
-; CHECK-NEXT: br label %return
-; CHECK: return:
-; CHECK-NEXT: %res = phi i32 [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ]
-; CHECK-NEXT: ret i32 %res
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [65 x i32], ptr @switch.table.unreachable_default_holes_0to64, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: ret i32 %switch.load
;
entry:
switch i32 %x, label %sw.default [
@@ -863,6 +802,7 @@ return:
}
+; A dense switch with a reachable default case should be optimized into a lookup table with a bounds check
define i32 @reachable_default_dense_0to130(i32 %x, i32 %y) {
; CHECK-LABEL: @reachable_default_dense_0to130(
; CHECK-NEXT: entry:
@@ -1027,6 +967,7 @@ return:
}
+; A dense switch with an unreachable default case should be optimized into a lookup table without bounds checks
define i32 @unreachable_default_dense_0to130(i32 %x, i32 %y) {
; CHECK-LABEL: @unreachable_default_dense_0to130(
; CHECK-NEXT: entry:
@@ -1185,6 +1126,8 @@ return:
}
+; A sparse switch with a reachable default case which would be optimized into a lookup table with a bounds check and a mask, but doesn't because
+; it would require a 131-bit mask
define i32 @reachable_default_holes_0to130(i32 %x, i32 %y) {
; CHECK-LABEL: @reachable_default_holes_0to130(
; CHECK-NEXT: entry:
@@ -1432,131 +1375,14 @@ return:
}
+; A sparse switch with an unreachable default case which can be optimized into a lookup table without bounds checks. Because the default case is
+; unreachable, the fact that a 131-bit mask would be required doesn't prevent lookup table optimization.
define i32 @unreachable_default_holes_0to130(i32 %x, i32 %y) {
; CHECK-LABEL: @unreachable_default_holes_0to130(
; CHECK-NEXT: entry:
-; CHECK-NEXT: switch i32 %x, label %sw.default [
-; CHECK-NEXT: i32 0, label %return
-; CHECK-NEXT: i32 1, label %bb7
-; CHECK-NEXT: i32 2, label %bb6
-; CHECK-NEXT: i32 4, label %bb4
-; CHECK-NEXT: i32 5, label %bb3
-; CHECK-NEXT: i32 6, label %bb2
-; CHECK-NEXT: i32 7, label %bb1
-; CHECK-NEXT: i32 9, label %bb7
-; CHECK-NEXT: i32 10, label %bb6
-; CHECK-NEXT: i32 11, label %bb5
-; CHECK-NEXT: i32 12, label %bb4
-; CHECK-NEXT: i32 14, label %bb2
-; CHECK-NEXT: i32 15, label %bb1
-; CHECK-NEXT: i32 16, label %return
-; CHECK-NEXT: i32 17, label %bb7
-; CHECK-NEXT: i32 19, label %bb5
-; CHECK-NEXT: i32 20, label %bb4
-; CHECK-NEXT: i32 21, label %bb3
-; CHECK-NEXT: i32 22, label %bb2
-; CHECK-NEXT: i32 24, label %return
-; CHECK-NEXT: i32 25, label %bb7
-; CHECK-NEXT: i32 26, label %bb6
-; CHECK-NEXT: i32 27, label %bb5
-; CHECK-NEXT: i32 29, label %bb3
-; CHECK-NEXT: i32 30, label %bb2
-; CHECK-NEXT: i32 31, label %bb1
-; CHECK-NEXT: i32 32, label %return
-; CHECK-NEXT: i32 34, label %bb6
-; CHECK-NEXT: i32 35, label %bb5
-; CHECK-NEXT: i32 36, label %bb4
-; CHECK-NEXT: i32 37, label %bb3
-; CHECK-NEXT: i32 39, label %bb1
-; CHECK-NEXT: i32 40, label %return
-; CHECK-NEXT: i32 41, label %bb7
-; CHECK-NEXT: i32 42, label %bb6
-; CHECK-NEXT: i32 44, label %bb4
-; CHECK-NEXT: i32 45, label %bb3
-; CHECK-NEXT: i32 46, label %bb2
-; CHECK-NEXT: i32 47, label %bb1
-; CHECK-NEXT: i32 49, label %bb7
-; CHECK-NEXT: i32 50, label %bb6
-; CHECK-NEXT: i32 51, label %bb5
-; CHECK-NEXT: i32 52, label %bb4
-; CHECK-NEXT: i32 54, label %bb2
-; CHECK-NEXT: i32 55, label %bb1
-; CHECK-NEXT: i32 56, label %return
-; CHECK-NEXT: i32 57, label %bb7
-; CHECK-NEXT: i32 59, label %bb5
-; CHECK-NEXT: i32 60, label %bb4
-; CHECK-NEXT: i32 61, label %bb3
-; CHECK-NEXT: i32 62, label %bb2
-; CHECK-NEXT: i32 64, label %return
-; CHECK-NEXT: i32 65, label %bb7
-; CHECK-NEXT: i32 66, label %bb6
-; CHECK-NEXT: i32 67, label %bb5
-; CHECK-NEXT: i32 69, label %bb3
-; CHECK-NEXT: i32 70, label %bb2
-; CHECK-NEXT: i32 71, label %bb1
-; CHECK-NEXT: i32 72, label %return
-; CHECK-NEXT: i32 74, label %bb6
-; CHECK-NEXT: i32 75, label %bb5
-; CHECK-NEXT: i32 76, label %bb4
-; CHECK-NEXT: i32 77, label %bb3
-; CHECK-NEXT: i32 79, label %bb1
-; CHECK-NEXT: i32 80, label %return
-; CHECK-NEXT: i32 81, label %bb7
-; CHECK-NEXT: i32 82, label %bb6
-; CHECK-NEXT: i32 84, label %bb4
-; CHECK-NEXT: i32 85, label %bb3
-; CHECK-NEXT: i32 86, label %bb2
-; CHECK-NEXT: i32 87, label %bb1
-; CHECK-NEXT: i32 89, label %bb7
-; CHECK-NEXT: i32 90, label %bb6
-; CHECK-NEXT: i32 91, label %bb5
-; CHECK-NEXT: i32 92, label %bb4
-; CHECK-NEXT: i32 94, label %bb2
-; CHECK-NEXT: i32 95, label %bb1
-; CHECK-NEXT: i32 97, label %bb7
-; CHECK-NEXT: i32 99, label %bb5
-; CHECK-NEXT: i32 100, label %bb4
-; CHECK-NEXT: i32 101, label %bb3
-; CHECK-NEXT: i32 102, label %bb2
-; CHECK-NEXT: i32 104, label %return
-; CHECK-NEXT: i32 105, label %bb7
-; CHECK-NEXT: i32 106, label %bb6
-; CHECK-NEXT: i32 107, label %bb5
-; CHECK-NEXT: i32 109, label %bb3
-; CHECK-NEXT: i32 110, label %bb2
-; CHECK-NEXT: i32 111, label %bb1
-; CHECK-NEXT: i32 112, label %return
-; CHECK-NEXT: i32 114, label %bb6
-; CHECK-NEXT: i32 115, label %bb5
-; CHECK-NEXT: i32 117, label %bb3
-; CHECK-NEXT: i32 119, label %bb1
-; CHECK-NEXT: i32 120, label %return
-; CHECK-NEXT: i32 122, label %bb6
-; CHECK-NEXT: i32 124, label %bb4
-; CHECK-NEXT: i32 125, label %bb3
-; CHECK-NEXT: i32 127, label %bb1
-; CHECK-NEXT: i32 129, label %bb7
-; CHECK-NEXT: i32 130, label %bb6
-; CHECK-NEXT: ]
-; CHECK: sw.default:
-; CHECK-NEXT: unreachable
-; CHECK: bb1:
-; CHECK-NEXT: br label %return
-; CHECK: bb2:
-; CHECK-NEXT: br label %return
-; CHECK: bb3:
-; CHECK-NEXT: br label %return
-; CHECK: bb4:
-; CHECK-NEXT: br label %return
-; CHECK: bb5:
-; CHECK-NEXT: br label %return
-; CHECK: bb6:
-; CHECK-NEXT: br label %return
-; CHECK: bb7:
-; CHECK-NEXT: br label %return
-; CHECK: return:
-; CHECK-NEXT: %res = phi i32 [ 1, %bb1 ], [ 2, %bb2 ], [ 3, %bb3 ], [ 4, %bb4 ], [ 5, %bb5 ], [ 6, %bb6 ], [ 7, %bb7 ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ], [ 0, %entry ]
-; CHECK-NEXT: ret i32 %res
+; CHECK-NEXT: %switch.gep = getelementptr inbounds [131 x i32], ptr @switch.table.unreachable_default_holes_0to130, i32 0, i32 %x
+; CHECK-NEXT: %switch.load = load i32, ptr %switch.gep, align 8
+; CHECK-NEXT: ret i32 %switch.load
;
entry:
switch i32 %x, label %sw.default [
@@ -1678,6 +1504,3 @@ return:
ret i32 %res
}
-;.
-; CHECK: attributes #0 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }
-;.
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