[llvm] [RISCV] Add groupid/bitmask for RISC-V extension (PR #94440)

[Pengcheng Wang via llvm-commits]

================
@@ -25,7 +25,7 @@
 class RISCVExtension<string name, int major, int minor, string desc,
                      list<SubtargetFeature> implies = [],
                      string fieldname = !subst("Feature", "Has", NAME),
-                     string value = "true">
+                     string value = "true", bits<3> groupID=0, int bitmaskShift=-1>
----------------
wangpc-pp wrote:

I prefer to add a `RISCVExtensionBitmask` class for these extensions that need a bitmask (not all extension need it):
```python
class RISCVExtensionBitmask<bits<3> groupID, int bitmaskShift> {
    bits<3> GroupID = groupID;
    bits<64> Bitmask = !shl(1, bitmaskShift);
}
def xxx : RISCVExtension<...>, RISCVExtensionBitmask<...>
```
The differences compared to your initial patch are:
* We don't need an extension name parameter.
* Inherit from `RISCVExtensionBitmask` instead of defining another record.

As for the Emitter side, you just need to find all `RISCVExtensionBitmask` definitions instead of filtering out `RISCVExtension`s without bitmask. You can still get the extension name via `Rec->getValueAsString("Name")` though it's not defined by `RISCVExtensionBitmask`, because the record contains all the fields it inherits.

https://github.com/llvm/llvm-project/pull/94440