[llvm] [DAG] computeKnownBits - abds(x, y) will be zero in the upper bits if x and y are sign-extended (PR #94448)

[Jay Foad via llvm-commits]

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@@ -3477,6 +3477,11 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
     Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
     Known = KnownBits::abds(Known, Known2);
+    Known.Zero.setHighBits(
+        std::min(
+            ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth + 1),
+            ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth + 1)) -
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jayfoad wrote:

But the logic looks sound to me.

https://github.com/llvm/llvm-project/pull/94448