[llvm] [ValueTracking] Infer relationship for the select with ICmp (PR #66668)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 4 19:25:13 PDT 2024
https://github.com/vfdff updated https://github.com/llvm/llvm-project/pull/66668
>From e2afb2153438c2cc349588972c67a091f8df5890 Mon Sep 17 00:00:00 2001
From: zhongyunde 00443407 <zhongyunde at huawei.com>
Date: Mon, 18 Sep 2023 05:07:53 -0400
Subject: [PATCH 1/3] [tests] precommit tests for ValueTracking
x-y+1 is positive when x > y, so abs (x-y+1) --> x-y+1
Fixes https://github.com/llvm/llvm-project/issues/54735
---
.../Transforms/InstSimplify/select-icmp.ll | 386 ++++++++++++++++++
1 file changed, 386 insertions(+)
create mode 100755 llvm/test/Transforms/InstSimplify/select-icmp.ll
diff --git a/llvm/test/Transforms/InstSimplify/select-icmp.ll b/llvm/test/Transforms/InstSimplify/select-icmp.ll
new file mode 100755
index 0000000000000..6961b568d3fd6
--- /dev/null
+++ b/llvm/test/Transforms/InstSimplify/select-icmp.ll
@@ -0,0 +1,386 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=instsimplify -S | FileCheck %s
+
+; TODO: https://alive2.llvm.org/ce/z/3ybZRl
+define i32 @pr54735_slt(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_slt(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp sle i32 [[SUB]], -1
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp slt i32 %x, %y ; x<y ? abs (x-y+1): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nsw i32 %x, %y
+ %add = add nsw i32 %sub, 1
+ %neg = xor i32 %sub, -1 ; sub nsw i32 0, %add
+ %abscond = icmp sle i32 %sub, -1
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; https://alive2.llvm.org/ce/z/fTTsdT
+define i32 @pr54735_sgt(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_sgt(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[SUB]], -1
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp sgt i32 %x, %y ; x>y ? abs (x-y+1): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nsw i32 %x, %y
+ %add = add nsw i32 %sub, 1
+ %neg = xor i32 %sub, -1 ; sub nsw i32 0, %add
+ %abscond = icmp slt i32 %sub, -1
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; https://alive2.llvm.org/ce/z/k9v75c
+define i32 @pr54735_sge(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_sge(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[SUB]], -1
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp sge i32 %x, %y ; x>y ? abs (x-y+1): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nsw i32 %x, %y
+ %add = add nsw i32 %sub, 1
+ %neg = xor i32 %sub, -1 ; sub nsw i32 0, %add
+ %abscond = icmp slt i32 %sub, -1
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; Don't need support for unsigned type.
+define i32 @pr54735_ugt(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_ugt(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nuw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[SUB]], 2
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -2
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp ult i32 [[SUB]], -2
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp ugt i32 %x, %y ; x>y ? abs (x-y+2): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nuw i32 %x, %y
+ %add = add nuw i32 %sub, 2
+ %neg = xor i32 %sub, -2 ; sub nuw i32 0, %add
+ %abscond = icmp ult i32 %sub, -2
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; Don't need support for unsigned type.
+define i32 @pr54735_uge(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_uge(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nuw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[SUB]], 2
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -2
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp ult i32 [[SUB]], -2
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp uge i32 %x, %y ; x>y ? abs (x-y+2): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nuw i32 %x, %y
+ %add = add nuw i32 %sub, 2
+ %neg = xor i32 %sub, -2 ; sub nuw i32 0, %add
+ %abscond = icmp ult i32 %sub, -2
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; Negative test: https://alive2.llvm.org/ce/z/oZyu4M
+define i8 @pr54735_without_nsw (i8 %x, i8 %y) {
+; CHECK-LABEL: @pr54735_without_nsw(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add i8 [[SUB]], 1
+; CHECK-NEXT: [[NEG:%.*]] = xor i8 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i8 [[SUB]], -1
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i8 [[NEG]], i8 [[ADD]]
+; CHECK-NEXT: ret i8 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i8 0
+;
+entry:
+ %cmp = icmp sgt i8 %x, %y
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub i8 %x, %y
+ %add = add i8 %sub, 1
+ %neg = xor i8 %sub, -1
+ %abscond = icmp slt i8 %sub, -1
+ %abs = select i1 %abscond, i8 %neg, i8 %add
+ ret i8 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i8 0
+}
+
+define i32 @pr54735_sle(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_sle(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[SUB]], -1
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp sle i32 %x, %y ; x<=y ? abs (x-y+1): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nsw i32 %x, %y
+ %add = add nsw i32 %sub, 1
+ %neg = xor i32 %sub, -1 ; sub nsw i32 0, %add
+ %abscond = icmp slt i32 %sub, -1
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; https://alive2.llvm.org/ce/z/pp9zJi
+define i32 @pr54735_slt_neg(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_slt_neg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], -12
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], 12
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp sle i32 [[SUB]], 12
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp slt i32 %x, %y ; x<y ? abs (x-y-12): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nsw i32 %x, %y
+ %add = add nsw i32 %sub, -12 ; %sub - 12
+ %neg = xor i32 %sub, 12 ; 12 - %sub
+ %abscond = icmp sle i32 %sub, 12
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; https://alive2.llvm.org/ce/z/9P6grR
+define i32 @pr54735_sle_neg(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_sle_neg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], -12
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], 12
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp sle i32 [[SUB]], 12
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp sle i32 %x, %y ; x<=y ? abs (x-y-12): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nsw i32 %x, %y
+ %add = add nsw i32 %sub, -12
+ %neg = xor i32 %sub, 12 ; %sub - 12
+ %abscond = icmp sle i32 %sub, 12
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; Don't need support for unsigned type.
+define i32 @pr54735_ult_neg(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_ult_neg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nuw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[SUB]], -12
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], 12
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp ule i32 [[SUB]], 12
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp ult i32 %x, %y ; x<y ? abs (x-y-12): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nuw i32 %x, %y
+ %add = add nuw i32 %sub, -12 ; %sub - 12
+ %neg = xor i32 %sub, 12 ; 12 - %sub
+ %abscond = icmp ule i32 %sub, 12
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; Don't need support for unsigned type.
+define i32 @pr54735_ule_neg(i32 %x, i32 %y) {
+; CHECK-LABEL: @pr54735_ule_neg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub nuw i32 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[SUB]], -12
+; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], 12
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp ule i32 [[SUB]], 12
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %cmp = icmp ule i32 %x, %y ; x<=y ? abs (x-y-12): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub nuw i32 %x, %y
+ %add = add nuw i32 %sub, -12
+ %neg = xor i32 %sub, 12 ; %sub - 12
+ %abscond = icmp ule i32 %sub, 12
+ %abs = select i1 %abscond, i32 %neg, i32 %add
+ ret i32 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i32 0
+}
+
+; Negative test: https://alive2.llvm.org/ce/z/Yqv4x2
+define i8 @pr54735_unexpect_const (i8 %x, i8 %y) {
+; CHECK-LABEL: @pr54735_unexpect_const(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
+; CHECK: cond.true:
+; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[X]], [[Y]]
+; CHECK-NEXT: [[ADD:%.*]] = add i8 [[SUB]], 2
+; CHECK-NEXT: [[NEG:%.*]] = xor i8 [[SUB]], -1
+; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i8 [[SUB]], -2
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i8 [[NEG]], i8 [[ADD]]
+; CHECK-NEXT: ret i8 [[ABS]]
+; CHECK: cond.end:
+; CHECK-NEXT: ret i8 0
+;
+entry:
+ %cmp = icmp sgt i8 %x, %y ; x>y ? abs (x-y+2): 0
+ br i1 %cmp, label %cond.true, label %cond.end
+
+cond.true: ; preds = %entry
+ %sub = sub i8 %x, %y
+ %add = add i8 %sub, 2 ; x-y+2
+ %neg = xor i8 %sub, -1 ; y-x-1
+ %neg1 = sub i8 %neg, 1 ; y-x-2
+ %abscond = icmp slt i8 %sub, -2
+ %abs = select i1 %abscond, i8 %neg, i8 %add
+ ret i8 %abs
+
+cond.end: ; preds = %entry, %cond.true
+ ret i8 0
+}
>From 9a92185b12cbf81f9284fdac4c6e026671aeea24 Mon Sep 17 00:00:00 2001
From: zhongyunde 00443407 <zhongyunde at huawei.com>
Date: Mon, 18 Sep 2023 05:07:53 -0400
Subject: [PATCH 2/3] [ValueTracking] Infer relationship for the select with
ICmp
x -nsw y < -C is false when x > y and C >= 0
Alive2 proof for sgt, sge : https://alive2.llvm.org/ce/z/tupvfi
Note: It only really makes sense in the context of signed comparison for
"X - Y must be positive if X >= Y and no overflow".
Fixes https://github.com/llvm/llvm-project/issues/54735
---
llvm/lib/Analysis/ValueTracking.cpp | 11 +++++++++++
llvm/test/Transforms/InstSimplify/select-icmp.ll | 10 ++--------
2 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 08138a5e2f2d9..a125dc05aada7 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -8883,6 +8883,17 @@ static std::optional<bool> isImpliedCondICmps(const ICmpInst *LHS,
if (L0 == R0 && L1 == R1)
return isImpliedCondMatchingOperands(LPred, RPred);
+ // It only really makes sense in the context of signed comparison for "X - Y
+ // must be positive if X >= Y and no overflow".
+ // Take SGT as an example: L0:x > L1:y and C >= 0
+ // ==> R0:(x -nsw y) < R1:(-C) is false
+ if ((LPred == ICmpInst::ICMP_SGT || LPred == ICmpInst::ICMP_SGE) &&
+ match(R0, m_NSWSub(m_Specific(L0), m_Specific(L1)))) {
+ if (match(R1, m_NonPositive()) &&
+ isImpliedCondMatchingOperands(LPred, RPred) == false)
+ return false;
+ }
+
// L0 = R0 = L1 + R1, L0 >=u L1 implies R0 >=u R1, L0 <u L1 implies R0 <u R1
if (L0 == R0 &&
(LPred == ICmpInst::ICMP_ULT || LPred == ICmpInst::ICMP_UGE) &&
diff --git a/llvm/test/Transforms/InstSimplify/select-icmp.ll b/llvm/test/Transforms/InstSimplify/select-icmp.ll
index 6961b568d3fd6..675cfcfcf8086 100755
--- a/llvm/test/Transforms/InstSimplify/select-icmp.ll
+++ b/llvm/test/Transforms/InstSimplify/select-icmp.ll
@@ -42,10 +42,7 @@ define i32 @pr54735_sgt(i32 %x, i32 %y) {
; CHECK: cond.true:
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
-; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
-; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[SUB]], -1
-; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
-; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK-NEXT: ret i32 [[ADD]]
; CHECK: cond.end:
; CHECK-NEXT: ret i32 0
;
@@ -74,10 +71,7 @@ define i32 @pr54735_sge(i32 %x, i32 %y) {
; CHECK: cond.true:
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
-; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
-; CHECK-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[SUB]], -1
-; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
-; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK-NEXT: ret i32 [[ADD]]
; CHECK: cond.end:
; CHECK-NEXT: ret i32 0
;
>From 0dacae0fef54dafbdfa35136d12a3e1899bf1b04 Mon Sep 17 00:00:00 2001
From: zhongyunde 00443407 <zhongyunde at huawei.com>
Date: Sat, 1 Jun 2024 05:01:26 -0400
Subject: [PATCH 3/3] [ValueTracking] Infer relationship for the select with
SLT
---
llvm/lib/Analysis/ValueTracking.cpp | 9 +++++++++
llvm/test/Transforms/InstSimplify/select-icmp.ll | 10 ++--------
2 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index a125dc05aada7..06d1aad337be3 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -8894,6 +8894,15 @@ static std::optional<bool> isImpliedCondICmps(const ICmpInst *LHS,
return false;
}
+ // Take SLT as an example: L0:x < L1:y and C <= 0
+ // ==> R0:(x -nsw y) < R1:(-C) is true
+ if ((LPred == ICmpInst::ICMP_SLT || LPred == ICmpInst::ICMP_SLE) &&
+ match(R0, m_NSWSub(m_Specific(L0), m_Specific(L1)))) {
+ if (match(R1, m_NonNegative()) &&
+ isImpliedCondMatchingOperands(LPred, RPred) == true)
+ return true;
+ }
+
// L0 = R0 = L1 + R1, L0 >=u L1 implies R0 >=u R1, L0 <u L1 implies R0 <u R1
if (L0 == R0 &&
(LPred == ICmpInst::ICMP_ULT || LPred == ICmpInst::ICMP_UGE) &&
diff --git a/llvm/test/Transforms/InstSimplify/select-icmp.ll b/llvm/test/Transforms/InstSimplify/select-icmp.ll
index 675cfcfcf8086..a82236338007a 100755
--- a/llvm/test/Transforms/InstSimplify/select-icmp.ll
+++ b/llvm/test/Transforms/InstSimplify/select-icmp.ll
@@ -226,11 +226,8 @@ define i32 @pr54735_slt_neg(i32 %x, i32 %y) {
; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
; CHECK: cond.true:
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
-; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], -12
; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], 12
-; CHECK-NEXT: [[ABSCOND:%.*]] = icmp sle i32 [[SUB]], 12
-; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
-; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK-NEXT: ret i32 [[NEG]]
; CHECK: cond.end:
; CHECK-NEXT: ret i32 0
;
@@ -258,11 +255,8 @@ define i32 @pr54735_sle_neg(i32 %x, i32 %y) {
; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
; CHECK: cond.true:
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
-; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], -12
; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], 12
-; CHECK-NEXT: [[ABSCOND:%.*]] = icmp sle i32 [[SUB]], 12
-; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
-; CHECK-NEXT: ret i32 [[ABS]]
+; CHECK-NEXT: ret i32 [[NEG]]
; CHECK: cond.end:
; CHECK-NEXT: ret i32 0
;
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