[llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

[Yingwei Zheng via llvm-commits]

================
@@ -1998,6 +1998,74 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
 
   return true;
 }
+#elif defined(__linux__) && defined(__riscv)
+#ifdef __has_include
+#if __has_include(<asm/hwprobe.h>)
+#include <asm/hwprobe.h>
+#endif
+#endif
+bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
+#ifdef RISCV_HWPROBE_KEY_MVENDORID
+  riscv_hwprobe Query[2]{
+      {RISCV_HWPROBE_KEY_IMA_EXT_0, 0},
+      {RISCV_HWPROBE_KEY_CPUPERF_0, 0},
+  };
+  int Ret = syscall(/*__NR_riscv_hwprobe=*/258, /*pairs=*/&Query,
+                    /*pair_count=*/1, /*cpu_count=*/0, /*cpus=*/0, /*flags=*/0);
+  if (Ret != 0)
+    return false;
+
+  uint64_t ExtMask = Query[0].value;
+  Features["f"] = ExtMask & RISCV_HWPROBE_IMA_FD;
+  Features["d"] = ExtMask & RISCV_HWPROBE_IMA_FD;
+  Features["c"] = ExtMask & RISCV_HWPROBE_IMA_C;
+  Features["v"] = ExtMask & RISCV_HWPROBE_IMA_V;
+  Features["zba"] = ExtMask & RISCV_HWPROBE_IMA_ZBA;
+  Features["zbb"] = ExtMask & RISCV_HWPROBE_IMA_ZBB;
+  Features["zbs"] = ExtMask & RISCV_HWPROBE_IMA_ZBS;
+  Features["zicboz"] = ExtMask & RISCV_HWPROBE_IMA_ZICBOZ;
+  Features["zbc"] = ExtMask & RISCV_HWPROBE_IMA_ZBC;
+  Features["zbkb"] = ExtMask & RISCV_HWPROBE_IMA_ZBKB;
+  Features["zbkc"] = ExtMask & RISCV_HWPROBE_IMA_ZBKC;
+  Features["zbkx"] = ExtMask & RISCV_HWPROBE_IMA_ZBKX;
+  Features["zknd"] = ExtMask & RISCV_HWPROBE_IMA_ZKND;
+  Features["zkne"] = ExtMask & RISCV_HWPROBE_IMA_ZKNE;
+  Features["zknh"] = ExtMask & RISCV_HWPROBE_IMA_ZKNH;
+  Features["zksed"] = ExtMask & RISCV_HWPROBE_IMA_ZKSED;
+  Features["zksh"] = ExtMask & RISCV_HWPROBE_IMA_ZKSH;
+  Features["zkt"] = ExtMask & RISCV_HWPROBE_IMA_ZKT;
+  Features["zvbb"] = ExtMask & RISCV_HWPROBE_IMA_ZVBB;
+  Features["zvbc"] = ExtMask & RISCV_HWPROBE_IMA_ZVBC;
+  Features["zvkb"] = ExtMask & RISCV_HWPROBE_IMA_ZVKB;
+  Features["zvkg"] = ExtMask & RISCV_HWPROBE_IMA_ZVKG;
+  Features["zvkned"] = ExtMask & RISCV_HWPROBE_IMA_ZVKNED;
+  Features["zvknha"] = ExtMask & RISCV_HWPROBE_IMA_ZVKNHA;
+  Features["zvknhb"] = ExtMask & RISCV_HWPROBE_IMA_ZVKNHB;
+  Features["zvksed"] = ExtMask & RISCV_HWPROBE_IMA_ZVKSED;
+  Features["zvksh"] = ExtMask & RISCV_HWPROBE_IMA_ZVKSH;
+  Features["zvkt"] = ExtMask & RISCV_HWPROBE_IMA_ZVKT;
+  Features["zfh"] = ExtMask & RISCV_HWPROBE_IMA_ZFH;
+  Features["zfhmin"] = ExtMask & RISCV_HWPROBE_IMA_ZFHMIN;
+  Features["zihintntl"] = ExtMask & RISCV_HWPROBE_IMA_ZIHINTNTL;
+  Features["zvfh"] = ExtMask & RISCV_HWPROBE_IMA_ZVFH;
+  Features["zvfhmin"] = ExtMask & RISCV_HWPROBE_IMA_ZVFHMIN;
+  Features["zfa"] = ExtMask & RISCV_HWPROBE_IMA_ZFA;
+  Features["ztso"] = ExtMask & RISCV_HWPROBE_IMA_ZTSO;
+  Features["zacas"] = ExtMask & RISCV_HWPROBE_IMA_ZACAS;
+  Features["zicond"] = ExtMask & RISCV_HWPROBE_IMA_ZICOND;
+  Features["zihintpause"] = ExtMask & RISCV_HWPROBE_IMA_ZIHINTPAUSE;
+
+  uint64_t MisalignedMask = Query[1].value;
+  if (MisalignedMask == RISCV_HWPROBE_MISALIGNED_FAST) {
----------------
dtcxzyw wrote:

I will remove the support for unaligned mem.
See https://lore.kernel.org/linux-riscv/20240529182649.2635123-1-evan@rivosinc.com/ for more details.


https://github.com/llvm/llvm-project/pull/94352