[llvm] [Neoverse-V2]Enable cmp + bcc fusion and cmp + csel fusion for Neoverse V2 (PR #94309)

[Mingming Liu via llvm-commits]

https://github.com/minglotus-6 created https://github.com/llvm/llvm-project/pull/94309

According to _4.11 instruction fusion section_ in Neoverse V2 software optimization guide [1], neoverse v2 fuses the following patterns
1. CMP/CMN (immediate) + B.cond
2. CMP/CMN (register) + B.cond
3. CMP + CSEL
4. CMP + CSET

LLVM supports `cmp + csel` at this [place](https://github.com/llvm/llvm-project/blob/3d361b225fe89ce1d8c93639f27d689082bd8dad/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp#L468-L469) and `cmp (immediate) + bcc` at this [place](https://github.com/llvm/llvm-project/blob/3d361b225fe89ce1d8c93639f27d689082bd8dad/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp#L451), so enabled pattern 1 and 3 for neoverse v2.

It seems pattern 2 and pattern 4 are not supported.


[1] https://developer.arm.com/documentation/pjdoc466751330-593177/latest/
 

>From 161a2cca652564c2d1b32df2f4e71e331798fb91 Mon Sep 17 00:00:00 2001
From: mingmingl <mingmingl at google.com>
Date: Mon, 3 Jun 2024 21:43:20 -0700
Subject: [PATCH] [Neoverse-V2]Enable cmp + bcc fusion and cmp + csel fusion
 for Neoverse V2

---
 llvm/lib/Target/AArch64/AArch64Processors.td | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td
index f2286ae17dba5..c16019357be4e 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -485,6 +485,8 @@ def TuneNeoverseV2 : SubtargetFeature<"neoversev2", "ARMProcFamily", "NeoverseV2
                                       "Neoverse V2 ARM processors", [
                                       FeatureFuseAES,
                                       FeatureFuseAdrpAdd,
+                                      FeatureCmpBccFusion,
+                                      FeatureFuseCCSelect,
                                       FeatureALULSLFast,
                                       FeaturePostRAScheduler,
                                       FeatureEnableSelectOptimize,