[llvm] Split vgpr regalloc pipeline (PR #93526)

[Carl Ritson via llvm-commits]

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@@ -1387,11 +1455,20 @@ bool GCNPassConfig::addRegAssignAndRewriteFast() {
 
   // Equivalent of PEI for SGPRs.
   addPass(&SILowerSGPRSpillsID);
+
+  // To Allocate wwm registers used in whole quad mode operations (for pixel
+  // shaders).
   addPass(&SIPreAllocateWWMRegsID);
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perlfu wrote:

I think the comment in the code is misleading since WWM registers pre-allocated are used in all shader types (not just PS) for atomic optimization and subgroup intercommunication.

https://github.com/llvm/llvm-project/pull/93526