[llvm] Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (PR #94149)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 2 00:21:18 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-arm
@llvm/pr-subscribers-backend-sparc
@llvm/pr-subscribers-backend-risc-v
Author: None (paperchalice)
<details>
<summary>Changes</summary>
Fix build with `EXPENSIVE_CHECKS`.
---
Patch is 138.35 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/94149.diff
122 Files Affected:
- (modified) llvm/include/llvm/CodeGen/SelectionDAG.h (+12)
- (modified) llvm/include/llvm/CodeGen/SelectionDAGISel.h (+38-5)
- (modified) llvm/include/llvm/CodeGen/StackProtector.h (+2)
- (modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+7-2)
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (+175-55)
- (modified) llvm/lib/Target/AArch64/AArch64.h (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (+13-6)
- (modified) llvm/lib/Target/AArch64/AArch64TargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPU.h (+1-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp (+6-2)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp (+47-17)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h (+20-8)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def (+6)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (+2-1)
- (modified) llvm/lib/Target/AMDGPU/R600ISelDAGToDAG.cpp (+12-1)
- (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+13-6)
- (modified) llvm/lib/Target/ARC/ARC.h (+1-1)
- (modified) llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp (+12-6)
- (modified) llvm/lib/Target/ARC/ARCTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/ARM/ARM.h (+1-1)
- (modified) llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp (+12-6)
- (modified) llvm/lib/Target/ARM/ARMTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/AVR/AVR.h (+1-1)
- (modified) llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp (+12-6)
- (modified) llvm/lib/Target/AVR/AVRTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/BPF/BPF.h (+1-1)
- (modified) llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp (+11-6)
- (modified) llvm/lib/Target/BPF/BPFTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/CSKY/CSKY.h (+1-1)
- (modified) llvm/lib/Target/CSKY/CSKYISelDAGToDAG.cpp (+13-6)
- (modified) llvm/lib/Target/CSKY/CSKYTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/Hexagon/Hexagon.h (+1-1)
- (modified) llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp (+8-3)
- (modified) llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h (+9-3)
- (modified) llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/Lanai/Lanai.h (+1-1)
- (modified) llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp (+11-10)
- (modified) llvm/lib/Target/Lanai/LanaiTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/LoongArch/LoongArch.h (+1-1)
- (modified) llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp (+8-3)
- (modified) llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h (+7-3)
- (modified) llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/M68k/M68k.h (+1-1)
- (modified) llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp (+11-6)
- (modified) llvm/lib/Target/M68k/M68kTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/MSP430/MSP430.h (+1-1)
- (modified) llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp (+12-6)
- (modified) llvm/lib/Target/MSP430/MSP430TargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/Mips/Mips.h (+1-1)
- (modified) llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp (+5-1)
- (modified) llvm/lib/Target/Mips/Mips16ISelDAGToDAG.h (+5)
- (modified) llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp (+8-4)
- (modified) llvm/lib/Target/Mips/MipsISelDAGToDAG.h (+8-5)
- (modified) llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp (+7-3)
- (modified) llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h (+6-2)
- (modified) llvm/lib/Target/Mips/MipsTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTX.h (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp (+9-4)
- (modified) llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h (+7-2)
- (modified) llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/PowerPC/PPC.h (+1-1)
- (modified) llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (+12-6)
- (modified) llvm/lib/Target/PowerPC/PPCTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/RISCV/RISCV.h (+1-1)
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (+8-3)
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h (+8-3)
- (modified) llvm/lib/Target/RISCV/RISCVTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/Sparc/Sparc.h (+1-1)
- (modified) llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp (+12-6)
- (modified) llvm/lib/Target/Sparc/SparcTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/SystemZ/SystemZ.h (+1-1)
- (modified) llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp (+13-6)
- (modified) llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/VE/VE.h (+1-1)
- (modified) llvm/lib/Target/VE/VEISelDAGToDAG.cpp (+11-6)
- (modified) llvm/lib/Target/VE/VETargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/WebAssembly/WebAssembly.h (+1-1)
- (modified) llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp (+14-6)
- (modified) llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/X86/X86.h (+1-1)
- (modified) llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp (+10-1)
- (modified) llvm/lib/Target/X86/X86ISelDAGToDAG.cpp (+19-9)
- (added) llvm/lib/Target/X86/X86ISelDAGToDAG.h (+25)
- (added) llvm/lib/Target/X86/X86PassRegistry.def (+19)
- (modified) llvm/lib/Target/X86/X86TargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/X86/X86TargetMachine.h (+3)
- (modified) llvm/lib/Target/XCore/XCore.h (+1-1)
- (modified) llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp (+13-6)
- (modified) llvm/lib/Target/XCore/XCoreTargetMachine.cpp (+1-1)
- (modified) llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp (+16-9)
- (modified) llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-no-rtn.ll (+4)
- (modified) llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll (+4-1)
- (modified) llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll (+3)
- (modified) llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/carryout-selection.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/divergence-driven-bitreverse.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/divergence-driven-ctlz-cttz.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/divergence-driven-min-max.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/divergence-driven-negsubinlineconst.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/divergence-driven-not-isel.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/fneg-fabs-divergence-driven-isel.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-no-rtn.ll (+3)
- (modified) llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-rtn.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll (+1)
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll (+1)
- (modified) llvm/test/CodeGen/X86/apx/no-rex2-general.ll (+2)
- (modified) llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll (+1)
- (modified) llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll (+1)
- (modified) llvm/test/CodeGen/X86/apx/no-rex2-special.ll (+1)
- (modified) llvm/test/tools/llc/new-pm/start-stop.ll (+2-2)
``````````diff
diff --git a/llvm/include/llvm/CodeGen/SelectionDAG.h b/llvm/include/llvm/CodeGen/SelectionDAG.h
index 6d28273029bd0..48cb0cdf851cf 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAG.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAG.h
@@ -29,6 +29,7 @@
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineMemOperand.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/CodeGenTypes/MachineValueType.h"
@@ -230,6 +231,7 @@ class SelectionDAG {
const TargetLibraryInfo *LibInfo = nullptr;
const FunctionVarLocs *FnVarLocs = nullptr;
MachineFunction *MF;
+ MachineFunctionAnalysisManager *MFAM = nullptr;
Pass *SDAGISelPass = nullptr;
LLVMContext *Context;
CodeGenOptLevel OptLevel;
@@ -459,6 +461,15 @@ class SelectionDAG {
UniformityInfo *UA, ProfileSummaryInfo *PSIin,
BlockFrequencyInfo *BFIin, FunctionVarLocs const *FnVarLocs);
+ void init(MachineFunction &NewMF, OptimizationRemarkEmitter &NewORE,
+ MachineFunctionAnalysisManager &AM,
+ const TargetLibraryInfo *LibraryInfo, UniformityInfo *UA,
+ ProfileSummaryInfo *PSIin, BlockFrequencyInfo *BFIin,
+ FunctionVarLocs const *FnVarLocs) {
+ init(NewMF, NewORE, nullptr, LibraryInfo, UA, PSIin, BFIin, FnVarLocs);
+ MFAM = &AM;
+ }
+
void setFunctionLoweringInfo(FunctionLoweringInfo * FuncInfo) {
FLI = FuncInfo;
}
@@ -469,6 +480,7 @@ class SelectionDAG {
MachineFunction &getMachineFunction() const { return *MF; }
const Pass *getPass() const { return SDAGISelPass; }
+ MachineFunctionAnalysisManager *getMFAM() { return MFAM; }
CodeGenOptLevel getOptLevel() const { return OptLevel; }
const DataLayout &getDataLayout() const { return MF->getDataLayout(); }
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGISel.h b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
index 837f8bf7263ea..4972af927cf1e 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
@@ -15,6 +15,7 @@
#define LLVM_CODEGEN_SELECTIONDAGISEL_H
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/IR/BasicBlock.h"
#include <memory>
@@ -24,6 +25,7 @@ class AAResults;
class AssumptionCache;
class TargetInstrInfo;
class TargetMachine;
+class SSPLayoutInfo;
class SelectionDAGBuilder;
class SDValue;
class MachineRegisterInfo;
@@ -31,6 +33,7 @@ class MachineFunction;
class OptimizationRemarkEmitter;
class TargetLowering;
class TargetLibraryInfo;
+class TargetTransformInfo;
class FunctionLoweringInfo;
class SwiftErrorValueTracking;
class GCFunctionInfo;
@@ -38,7 +41,7 @@ class ScheduleDAGSDNodes;
/// SelectionDAGISel - This is the common base class used for SelectionDAG-based
/// pattern-matching instruction selectors.
-class SelectionDAGISel : public MachineFunctionPass {
+class SelectionDAGISel {
public:
TargetMachine &TM;
const TargetLibraryInfo *LibInfo;
@@ -51,6 +54,10 @@ class SelectionDAGISel : public MachineFunctionPass {
AAResults *AA = nullptr;
AssumptionCache *AC = nullptr;
GCFunctionInfo *GFI = nullptr;
+ SSPLayoutInfo *SP = nullptr;
+#ifndef NDEBUG
+ TargetTransformInfo *TTI = nullptr;
+#endif
CodeGenOptLevel OptLevel;
const TargetInstrInfo *TII;
const TargetLowering *TLI;
@@ -67,16 +74,18 @@ class SelectionDAGISel : public MachineFunctionPass {
/// functions. Storing the filter result here so that we only need to do the
/// filtering once.
bool MatchFilterFuncName = false;
+ StringRef FuncName;
- explicit SelectionDAGISel(char &ID, TargetMachine &tm,
+ explicit SelectionDAGISel(TargetMachine &tm,
CodeGenOptLevel OL = CodeGenOptLevel::Default);
- ~SelectionDAGISel() override;
+ virtual ~SelectionDAGISel();
const TargetLowering *getTargetLowering() const { return TLI; }
- void getAnalysisUsage(AnalysisUsage &AU) const override;
+ void initializeAnalysisResults(MachineFunctionAnalysisManager &MFAM);
+ void initializeAnalysisResults(MachineFunctionPass &MFP);
- bool runOnMachineFunction(MachineFunction &MF) override;
+ virtual bool runOnMachineFunction(MachineFunction &mf);
virtual void emitFunctionEntryCode() {}
@@ -517,6 +526,30 @@ class SelectionDAGISel : public MachineFunctionPass {
bool isMorphNodeTo);
};
+class SelectionDAGISelLegacy : public MachineFunctionPass {
+ std::unique_ptr<SelectionDAGISel> Selector;
+
+public:
+ SelectionDAGISelLegacy(char &ID, std::unique_ptr<SelectionDAGISel> S);
+
+ ~SelectionDAGISelLegacy() override = default;
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+
+ bool runOnMachineFunction(MachineFunction &MF) override;
+};
+
+class SelectionDAGISelPass : public PassInfoMixin<SelectionDAGISelPass> {
+ std::unique_ptr<SelectionDAGISel> Selector;
+
+protected:
+ SelectionDAGISelPass(std::unique_ptr<SelectionDAGISel> Selector)
+ : Selector(std::move(Selector)) {}
+
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
}
#endif /* LLVM_CODEGEN_SELECTIONDAGISEL_H */
diff --git a/llvm/include/llvm/CodeGen/StackProtector.h b/llvm/include/llvm/CodeGen/StackProtector.h
index eb5d9d0caebc6..dfafc781067d7 100644
--- a/llvm/include/llvm/CodeGen/StackProtector.h
+++ b/llvm/include/llvm/CodeGen/StackProtector.h
@@ -109,6 +109,8 @@ class StackProtector : public FunctionPass {
StackProtector();
+ SSPLayoutInfo &getLayoutInfo() { return LayoutInfo; }
+
void getAnalysisUsage(AnalysisUsage &AU) const override;
// Return true if StackProtector is supposed to be handled by SelectionDAG.
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index 17bea5da48ce1..afe066101c753 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -140,6 +140,9 @@ template <typename DerivedT, typename TargetMachineT> class CodeGenPassBuilder {
}
protected:
+ template <typename PassT>
+ using has_required_t = decltype(std::declval<PassT &>().isRequired());
+
template <typename PassT>
using is_module_pass_t = decltype(std::declval<PassT &>().run(
std::declval<Module &>(), std::declval<ModuleAnalysisManager &>()));
@@ -170,8 +173,10 @@ template <typename DerivedT, typename TargetMachineT> class CodeGenPassBuilder {
static_assert((is_detected<is_function_pass_t, PassT>::value ||
is_detected<is_module_pass_t, PassT>::value) &&
"Only module pass and function pass are supported.");
-
- if (!PB.runBeforeAdding(Name))
+ bool Required = false;
+ if constexpr (is_detected<has_required_t, PassT>::value)
+ Required = PassT::isRequired();
+ if (!PB.runBeforeAdding(Name) && !Required)
return;
// Add Function Pass
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 8addaf1ae3e54..2c1e557ca1099 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -341,9 +341,49 @@ void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
// SelectionDAGISel code
//===----------------------------------------------------------------------===//
-SelectionDAGISel::SelectionDAGISel(char &ID, TargetMachine &tm,
- CodeGenOptLevel OL)
- : MachineFunctionPass(ID), TM(tm), FuncInfo(new FunctionLoweringInfo()),
+SelectionDAGISelLegacy::SelectionDAGISelLegacy(
+ char &ID, std::unique_ptr<SelectionDAGISel> S)
+ : MachineFunctionPass(ID), Selector(std::move(S)) {
+ initializeGCModuleInfoPass(*PassRegistry::getPassRegistry());
+ initializeBranchProbabilityInfoWrapperPassPass(
+ *PassRegistry::getPassRegistry());
+ initializeAAResultsWrapperPassPass(*PassRegistry::getPassRegistry());
+ initializeTargetLibraryInfoWrapperPassPass(*PassRegistry::getPassRegistry());
+}
+
+bool SelectionDAGISelLegacy::runOnMachineFunction(MachineFunction &MF) {
+ // If we already selected that function, we do not need to run SDISel.
+ if (MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::Selected))
+ return false;
+
+ // Do some sanity-checking on the command-line options.
+ if (EnableFastISelAbort && !Selector->TM.Options.EnableFastISel)
+ report_fatal_error("-fast-isel-abort > 0 requires -fast-isel");
+
+ // Decide what flavour of variable location debug-info will be used, before
+ // we change the optimisation level.
+ MF.setUseDebugInstrRef(MF.shouldUseDebugInstrRef());
+
+ // Reset the target options before resetting the optimization
+ // level below.
+ // FIXME: This is a horrible hack and should be processed via
+ // codegen looking at the optimization level explicitly when
+ // it wants to look at it.
+ Selector->TM.resetTargetOptions(MF.getFunction());
+ // Reset OptLevel to None for optnone functions.
+ CodeGenOptLevel NewOptLevel = skipFunction(MF.getFunction())
+ ? CodeGenOptLevel::None
+ : Selector->OptLevel;
+
+ Selector->MF = &MF;
+ OptLevelChanger OLC(*Selector, NewOptLevel);
+ Selector->initializeAnalysisResults(*this);
+ return Selector->runOnMachineFunction(MF);
+}
+
+SelectionDAGISel::SelectionDAGISel(TargetMachine &tm, CodeGenOptLevel OL)
+ : TM(tm), FuncInfo(new FunctionLoweringInfo()),
SwiftError(new SwiftErrorValueTracking()),
CurDAG(new SelectionDAG(tm, OL)),
SDB(std::make_unique<SelectionDAGBuilder>(*CurDAG, *FuncInfo, *SwiftError,
@@ -361,14 +401,17 @@ SelectionDAGISel::~SelectionDAGISel() {
delete SwiftError;
}
-void SelectionDAGISel::getAnalysisUsage(AnalysisUsage &AU) const {
+void SelectionDAGISelLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
+ CodeGenOptLevel OptLevel = Selector->OptLevel;
if (OptLevel != CodeGenOptLevel::None)
AU.addRequired<AAResultsWrapperPass>();
AU.addRequired<GCModuleInfo>();
AU.addRequired<StackProtector>();
AU.addPreserved<GCModuleInfo>();
AU.addRequired<TargetLibraryInfoWrapperPass>();
+#ifndef NDEBUG
AU.addRequired<TargetTransformInfoWrapperPass>();
+#endif
AU.addRequired<AssumptionCacheTracker>();
if (UseMBPI && OptLevel != CodeGenOptLevel::None)
AU.addRequired<BranchProbabilityInfoWrapperPass>();
@@ -406,65 +449,129 @@ static void computeUsesMSVCFloatingPoint(const Triple &TT, const Function &F,
}
}
-bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
+PreservedAnalyses
+SelectionDAGISelPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
// If we already selected that function, we do not need to run SDISel.
- if (mf.getProperties().hasProperty(
+ if (MF.getProperties().hasProperty(
MachineFunctionProperties::Property::Selected))
- return false;
- // Do some sanity-checking on the command-line options.
- assert((!EnableFastISelAbort || TM.Options.EnableFastISel) &&
- "-fast-isel-abort > 0 requires -fast-isel");
-
- const Function &Fn = mf.getFunction();
- MF = &mf;
+ return PreservedAnalyses::all();
-#ifndef NDEBUG
- StringRef FuncName = Fn.getName();
- MatchFilterFuncName = isFunctionInPrintList(FuncName);
-#else
- (void)MatchFilterFuncName;
-#endif
+ // Do some sanity-checking on the command-line options.
+ if (EnableFastISelAbort && !Selector->TM.Options.EnableFastISel)
+ report_fatal_error("-fast-isel-abort > 0 requires -fast-isel");
// Decide what flavour of variable location debug-info will be used, before
// we change the optimisation level.
- bool InstrRef = mf.shouldUseDebugInstrRef();
- mf.setUseDebugInstrRef(InstrRef);
+ MF.setUseDebugInstrRef(MF.shouldUseDebugInstrRef());
// Reset the target options before resetting the optimization
// level below.
// FIXME: This is a horrible hack and should be processed via
// codegen looking at the optimization level explicitly when
// it wants to look at it.
- TM.resetTargetOptions(Fn);
+ Selector->TM.resetTargetOptions(MF.getFunction());
+ // Reset OptLevel to None for optnone functions.
+ // TODO: Add a function analysis to handle this.
+ Selector->MF = &MF;
// Reset OptLevel to None for optnone functions.
- CodeGenOptLevel NewOptLevel = OptLevel;
- if (OptLevel != CodeGenOptLevel::None && skipFunction(Fn))
- NewOptLevel = CodeGenOptLevel::None;
- OptLevelChanger OLC(*this, NewOptLevel);
+ CodeGenOptLevel NewOptLevel = MF.getFunction().hasOptNone()
+ ? CodeGenOptLevel::None
+ : Selector->OptLevel;
+
+ OptLevelChanger OLC(*Selector, NewOptLevel);
+ Selector->initializeAnalysisResults(MFAM);
+ Selector->runOnMachineFunction(MF);
+
+ return getMachineFunctionPassPreservedAnalyses();
+}
+
+void SelectionDAGISel::initializeAnalysisResults(
+ MachineFunctionAnalysisManager &MFAM) {
+ auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(*MF)
+ .getManager();
+ auto &MAMP = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(*MF);
+ Function &Fn = MF->getFunction();
+#ifndef NDEBUG
+ FuncName = Fn.getName();
+ MatchFilterFuncName = isFunctionInPrintList(FuncName);
+#else
+ (void)MatchFilterFuncName;
+#endif
TII = MF->getSubtarget().getInstrInfo();
TLI = MF->getSubtarget().getTargetLowering();
RegInfo = &MF->getRegInfo();
- LibInfo = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(Fn);
- GFI = Fn.hasGC() ? &getAnalysis<GCModuleInfo>().getFunctionInfo(Fn) : nullptr;
+ LibInfo = &FAM.getResult<TargetLibraryAnalysis>(Fn);
+ GFI = Fn.hasGC() ? &FAM.getResult<GCFunctionAnalysis>(Fn) : nullptr;
ORE = std::make_unique<OptimizationRemarkEmitter>(&Fn);
- AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(mf.getFunction());
- auto *PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
+ AC = &FAM.getResult<AssumptionAnalysis>(Fn);
+ auto *PSI = MAMP.getCachedResult<ProfileSummaryAnalysis>(*Fn.getParent());
BlockFrequencyInfo *BFI = nullptr;
+ FAM.getResult<BlockFrequencyAnalysis>(Fn);
if (PSI && PSI->hasProfileSummary() && OptLevel != CodeGenOptLevel::None)
- BFI = &getAnalysis<LazyBlockFrequencyInfoPass>().getBFI();
+ BFI = &FAM.getResult<BlockFrequencyAnalysis>(Fn);
FunctionVarLocs const *FnVarLocs = nullptr;
if (isAssignmentTrackingEnabled(*Fn.getParent()))
- FnVarLocs = getAnalysis<AssignmentTrackingAnalysis>().getResults();
+ FnVarLocs = &FAM.getResult<DebugAssignmentTrackingAnalysis>(Fn);
- ISEL_DUMP(dbgs() << "\n\n\n=== " << FuncName << "\n");
+ auto *UA = FAM.getCachedResult<UniformityInfoAnalysis>(Fn);
+ CurDAG->init(*MF, *ORE, MFAM, LibInfo, UA, PSI, BFI, FnVarLocs);
+ SwiftError->setFunction(*MF);
+
+ // Now get the optional analyzes if we want to.
+ // This is based on the possibly changed OptLevel (after optnone is taken
+ // into account). That's unfortunate but OK because it just means we won't
+ // ask for passes that have been required anyway.
+
+ if (UseMBPI && OptLevel != CodeGenOptLevel::None)
+ FuncInfo->BPI = &FAM.getResult<BranchProbabilityAnalysis>(Fn);
+ else
+ FuncInfo->BPI = nullptr;
+
+ if (OptLevel != CodeGenOptLevel::None)
+ AA = &FAM.getResult<AAManager>(Fn);
+ else
+ AA = nullptr;
+
+ SP = &FAM.getResult<SSPLayoutAnalysis>(Fn);
+
+#ifndef NDEBUG
+ TTI = &FAM.getResult<TargetIRAnalysis>(Fn);
+#endif
+}
+
+void SelectionDAGISel::initializeAnalysisResults(MachineFunctionPass &MFP) {
+ Function &Fn = MF->getFunction();
+#ifndef NDEBUG
+ FuncName = Fn.getName();
+ MatchFilterFuncName = isFunctionInPrintList(FuncName);
+#else
+ (void)MatchFilterFuncName;
+#endif
+
+ TII = MF->getSubtarget().getInstrInfo();
+ TLI = MF->getSubtarget().getTargetLowering();
+ RegInfo = &MF->getRegInfo();
+ LibInfo = &MFP.getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(Fn);
+ GFI = Fn.hasGC() ? &MFP.getAnalysis<GCModuleInfo>().getFunctionInfo(Fn)
+ : nullptr;
+ ORE = std::make_unique<OptimizationRemarkEmitter>(&Fn);
+ AC = &MFP.getAnalysis<AssumptionCacheTracker>().getAssumptionCache(Fn);
+ auto *PSI = &MFP.getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
+ BlockFrequencyInfo *BFI = nullptr;
+ if (PSI && PSI->hasProfileSummary() && OptLevel != CodeGenOptLevel::None)
+ BFI = &MFP.getAnalysis<LazyBlockFrequencyInfoPass>().getBFI();
+
+ FunctionVarLocs const *FnVarLocs = nullptr;
+ if (isAssignmentTrackingEnabled(*Fn.getParent()))
+ FnVarLocs = MFP.getAnalysis<AssignmentTrackingAnalysis>().getResults();
UniformityInfo *UA = nullptr;
- if (auto *UAPass = getAnalysisIfAvailable<UniformityInfoWrapperPass>())
+ if (auto *UAPass = MFP.getAnalysisIfAvailable<UniformityInfoWrapperPass>())
UA = &UAPass->getUniformityInfo();
- CurDAG->init(*MF, *ORE, this, LibInfo, UA, PSI, BFI, FnVarLocs);
- FuncInfo->set(Fn, *MF, CurDAG);
+ CurDAG->init(*MF, *ORE, &MFP, LibInfo, UA, PSI, BFI, FnVarLocs);
SwiftError->setFunction(*MF);
// Now get the optional analyzes if we want to.
@@ -473,15 +580,32 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
// ask for passes that have been required anyway.
if (UseMBPI && OptLevel != CodeGenOptLevel::None)
- FuncInfo->BPI = &getAnalysis<BranchProbabilityInfoWrapperPass>().getBPI();
+ FuncInfo->BPI =
+ &MFP.getAnalysis<BranchProbabilityInfoWrapperPass>().getBPI();
else
FuncInfo->BPI = nullptr;
if (OptLevel != CodeGenOptLevel::None)
- AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
+ AA = &MFP.getAnalysis<AAResultsWrapperPass>().getAAResults();
else
AA = nullptr;
+ SP = &MFP.getAnalysis<StackProtector>().getLayoutInfo();
+
+#ifndef NDEBUG
+ TTI = &MFP.getAnalysis<TargetTransformInfoWrapperPass>().getTTI(Fn);
+#endif
+}
+
+bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
+ const Function &Fn = mf.getFunction();
+
+ bool InstrRef = mf.shouldUseDebugInstrRef();
+
+ FuncInfo->set(MF->getFunction(), *MF, CurDAG);
+
+ ISEL_DUMP(dbgs() << "\n\n\n=== " << FuncName << '\n');
+
SDB->init(GFI, AA, AC, LibInfo);
MF->setHasInlineAsm(false);
@@ -776,11 +900,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
StringRef GroupName = "sdag";
StringRef GroupDescription = "Instruction Selection and Scheduling";
std::string BlockName;
- bool MatchFilterBB = false; (void)MatchFilterBB;
-#ifndef NDEBUG
- TargetTransformInfo &TTI =
- getAnalysis<TargetTransformInfoWrapperPass>().getTTI(*FuncInfo->Fn);
-#endif
+ bool MatchFilterBB = false;
+ (void)MatchFilterBB;
// Pre-type legalization allow creation of any node types.
CurDAG->NewNodesMustHaveLegalTypes = false;
@@ -805,7 +926,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -825,7 +946,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -847,7 +968,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -871,7 +992,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
}
@@ -889,7 +1010,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -905,7 +1026,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergen...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/94149
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