[llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)
Owen Anderson via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 2 00:16:55 PDT 2024
https://github.com/resistor updated https://github.com/llvm/llvm-project/pull/83218
>From 3763d84d3a102a77169a1bbc3cf1c2f413b24ea3 Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor at mac.com>
Date: Tue, 27 Feb 2024 22:19:50 -0500
Subject: [PATCH 1/5] Apply the `AdjustICmpImmAndPred` optimization when it
results in a one-instruction immediate materialization over a two-instruction
materialization.
https://github.com/llvm/llvm-project/issues/76460
---
.../GISel/AArch64PostLegalizerLowering.cpp | 12 +-
.../CodeGen/AArch64/GlobalISel/icmp-cst.ll | 185 ++++++++++++++++++
2 files changed, 193 insertions(+), 4 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
index 77b8cbe5793c3..1bc8cb6c162dc 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
@@ -563,7 +563,8 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P,
auto ValAndVReg = getIConstantVRegValWithLookThrough(RHS, MRI);
if (!ValAndVReg)
return std::nullopt;
- uint64_t C = ValAndVReg->Value.getZExtValue();
+ uint64_t OriginalC = ValAndVReg->Value.getZExtValue();
+ uint64_t C = OriginalC;
if (isLegalArithImmed(C))
return std::nullopt;
@@ -633,9 +634,12 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P,
// predicate if it is.
if (Size == 32)
C = static_cast<uint32_t>(C);
- if (!isLegalArithImmed(C))
- return std::nullopt;
- return {{C, P}};
+ if (isLegalArithImmed(C))
+ return {{C, P}};
+ if (AArch64_AM::isLogicalImmediate(C, Size) &&
+ !AArch64_AM::isLogicalImmediate(OriginalC, Size))
+ return {{C, P}};
+ return std::nullopt;
}
/// Determine whether or not it is possible to update the RHS and predicate of
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll b/llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll
new file mode 100644
index 0000000000000..e6b27943372a8
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll
@@ -0,0 +1,185 @@
+; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck %s
+
+; CHECK-NOT: movk
+
+define dso_local noundef i1 @ule_11111111(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 286331154
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_22222222(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 572662307
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_33333333(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 858993460
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_44444444(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 1145324613
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_55555555(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 1431655766
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_66666666(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 1717986919
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_77777777(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, 2004318072
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_88888888(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, -2004318071
+ ret i1 %2
+}
+
+define dso_local noundef i1 @ule_99999999(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, -1717986918
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_11111111(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 286331152
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_22222222(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 572662305
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_33333333(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 858993458
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_44444444(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 1145324611
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_55555555(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 1431655764
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_66666666(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 1717986917
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_77777777(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, 2004318070
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_88888888(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, -2004318073
+ ret i1 %2
+}
+
+define dso_local noundef i1 @uge_99999999(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, -1717986920
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_11111111(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 286331154
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_22222222(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 572662307
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_33333333(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 858993460
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_44444444(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 1145324613
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_55555555(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 1431655766
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_66666666(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 1717986919
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_77777777(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp slt i32 %0, 2004318072
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_88888888(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, -2004318071
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sle_99999999(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ult i32 %0, -1717986918
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_11111111(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 286331152
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_22222222(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 572662305
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_33333333(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 858993458
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_44444444(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 1145324611
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_55555555(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 1431655764
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_66666666(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 1717986917
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_77777777(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp sgt i32 %0, 2004318070
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_88888888(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, -2004318073
+ ret i1 %2
+}
+
+define dso_local noundef i1 @sge_99999999(i32 noundef %0) local_unnamed_addr #0 {
+ %2 = icmp ugt i32 %0, -1717986920
+ ret i1 %2
+}
+
+attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "frame-pointer"="non-leaf" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a,-fmv" }
\ No newline at end of file
>From bedecedc189acd0223de27ee95331ecd8a429b57 Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor at mac.com>
Date: Wed, 28 Feb 2024 15:10:28 -0500
Subject: [PATCH 2/5] Address feedback on testcase.
---
.../CodeGen/AArch64/GlobalISel/icmp-cst.ll | 185 -----
llvm/test/CodeGen/AArch64/icmp-cst.ll | 687 ++++++++++++++++++
2 files changed, 687 insertions(+), 185 deletions(-)
delete mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll
create mode 100644 llvm/test/CodeGen/AArch64/icmp-cst.ll
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll b/llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll
deleted file mode 100644
index e6b27943372a8..0000000000000
--- a/llvm/test/CodeGen/AArch64/GlobalISel/icmp-cst.ll
+++ /dev/null
@@ -1,185 +0,0 @@
-; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck %s
-
-; CHECK-NOT: movk
-
-define dso_local noundef i1 @ule_11111111(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, 286331154
- ret i1 %2
-}
-
-define dso_local noundef i1 @ule_22222222(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, 572662307
- ret i1 %2
-}
-
-define dso_local noundef i1 @ule_33333333(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, 858993460
- ret i1 %2
-}
-
-define dso_local noundef i1 @ule_44444444(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, 1145324613
- ret i1 %2
-}
-
-define dso_local noundef i1 @ule_55555555(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, 1431655766
- ret i1 %2
-}
-
-define dso_local noundef i1 @ule_66666666(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, 1717986919
- ret i1 %2
-}
-
-define dso_local noundef i1 @ule_77777777(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, 2004318072
- ret i1 %2
-}
-
-define dso_local noundef i1 @ule_88888888(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, -2004318071
- ret i1 %2
-}
-
-define dso_local noundef i1 @ule_99999999(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, -1717986918
- ret i1 %2
-}
-
-define dso_local noundef i1 @uge_11111111(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, 286331152
- ret i1 %2
-}
-
-define dso_local noundef i1 @uge_22222222(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, 572662305
- ret i1 %2
-}
-
-define dso_local noundef i1 @uge_33333333(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, 858993458
- ret i1 %2
-}
-
-define dso_local noundef i1 @uge_44444444(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, 1145324611
- ret i1 %2
-}
-
-define dso_local noundef i1 @uge_55555555(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, 1431655764
- ret i1 %2
-}
-
-define dso_local noundef i1 @uge_66666666(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, 1717986917
- ret i1 %2
-}
-
-define dso_local noundef i1 @uge_77777777(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, 2004318070
- ret i1 %2
-}
-
-define dso_local noundef i1 @uge_88888888(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, -2004318073
- ret i1 %2
-}
-
-define dso_local noundef i1 @uge_99999999(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, -1717986920
- ret i1 %2
-}
-
-define dso_local noundef i1 @sle_11111111(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp slt i32 %0, 286331154
- ret i1 %2
-}
-
-define dso_local noundef i1 @sle_22222222(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp slt i32 %0, 572662307
- ret i1 %2
-}
-
-define dso_local noundef i1 @sle_33333333(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp slt i32 %0, 858993460
- ret i1 %2
-}
-
-define dso_local noundef i1 @sle_44444444(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp slt i32 %0, 1145324613
- ret i1 %2
-}
-
-define dso_local noundef i1 @sle_55555555(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp slt i32 %0, 1431655766
- ret i1 %2
-}
-
-define dso_local noundef i1 @sle_66666666(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp slt i32 %0, 1717986919
- ret i1 %2
-}
-
-define dso_local noundef i1 @sle_77777777(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp slt i32 %0, 2004318072
- ret i1 %2
-}
-
-define dso_local noundef i1 @sle_88888888(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, -2004318071
- ret i1 %2
-}
-
-define dso_local noundef i1 @sle_99999999(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ult i32 %0, -1717986918
- ret i1 %2
-}
-
-define dso_local noundef i1 @sge_11111111(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp sgt i32 %0, 286331152
- ret i1 %2
-}
-
-define dso_local noundef i1 @sge_22222222(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp sgt i32 %0, 572662305
- ret i1 %2
-}
-
-define dso_local noundef i1 @sge_33333333(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp sgt i32 %0, 858993458
- ret i1 %2
-}
-
-define dso_local noundef i1 @sge_44444444(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp sgt i32 %0, 1145324611
- ret i1 %2
-}
-
-define dso_local noundef i1 @sge_55555555(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp sgt i32 %0, 1431655764
- ret i1 %2
-}
-
-define dso_local noundef i1 @sge_66666666(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp sgt i32 %0, 1717986917
- ret i1 %2
-}
-
-define dso_local noundef i1 @sge_77777777(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp sgt i32 %0, 2004318070
- ret i1 %2
-}
-
-define dso_local noundef i1 @sge_88888888(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, -2004318073
- ret i1 %2
-}
-
-define dso_local noundef i1 @sge_99999999(i32 noundef %0) local_unnamed_addr #0 {
- %2 = icmp ugt i32 %0, -1717986920
- ret i1 %2
-}
-
-attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "frame-pointer"="non-leaf" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a,-fmv" }
\ No newline at end of file
diff --git a/llvm/test/CodeGen/AArch64/icmp-cst.ll b/llvm/test/CodeGen/AArch64/icmp-cst.ll
new file mode 100644
index 0000000000000..e3768c1870c26
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/icmp-cst.ll
@@ -0,0 +1,687 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck --check-prefix=GISEL %s
+; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=0 < %s | FileCheck --check-prefix=SDAG %s
+
+define i1 @ule_11111111(i32 noundef %0) {
+; GISEL-LABEL: ule_11111111:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #286331153 // =0x11111111
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: ule_11111111:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #4370 // =0x1112
+; SDAG-NEXT: movk w8, #4369, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, 286331154
+ ret i1 %2
+}
+
+define i1 @ule_22222222(i32 noundef %0) {
+; GISEL-LABEL: ule_22222222:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #572662306 // =0x22222222
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: ule_22222222:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #8739 // =0x2223
+; SDAG-NEXT: movk w8, #8738, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, 572662307
+ ret i1 %2
+}
+
+define i1 @ule_33333333(i32 noundef %0) {
+; GISEL-LABEL: ule_33333333:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #858993459 // =0x33333333
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: ule_33333333:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #13108 // =0x3334
+; SDAG-NEXT: movk w8, #13107, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, 858993460
+ ret i1 %2
+}
+
+define i1 @ule_44444444(i32 noundef %0) {
+; GISEL-LABEL: ule_44444444:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: ule_44444444:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #17477 // =0x4445
+; SDAG-NEXT: movk w8, #17476, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, 1145324613
+ ret i1 %2
+}
+
+define i1 @ule_55555555(i32 noundef %0) {
+; GISEL-LABEL: ule_55555555:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: ule_55555555:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #21846 // =0x5556
+; SDAG-NEXT: movk w8, #21845, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, 1431655766
+ ret i1 %2
+}
+
+define i1 @ule_66666666(i32 noundef %0) {
+; GISEL-LABEL: ule_66666666:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: ule_66666666:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #26215 // =0x6667
+; SDAG-NEXT: movk w8, #26214, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, 1717986919
+ ret i1 %2
+}
+
+define i1 @ule_77777777(i32 noundef %0) {
+; GISEL-LABEL: ule_77777777:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: ule_77777777:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #30584 // =0x7778
+; SDAG-NEXT: movk w8, #30583, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, 2004318072
+ ret i1 %2
+}
+
+define i1 @ule_88888888(i32 noundef %0) {
+; GISEL-LABEL: ule_88888888:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: ule_88888888:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #34953 // =0x8889
+; SDAG-NEXT: movk w8, #34952, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, -2004318071
+ ret i1 %2
+}
+
+define i1 @ule_99999999(i32 noundef %0) {
+; GISEL-LABEL: ule_99999999:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: ule_99999999:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #39322 // =0x999a
+; SDAG-NEXT: movk w8, #39321, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, -1717986918
+ ret i1 %2
+}
+
+define i1 @uge_11111111(i32 noundef %0) {
+; GISEL-LABEL: uge_11111111:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #286331153 // =0x11111111
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: uge_11111111:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #4368 // =0x1110
+; SDAG-NEXT: movk w8, #4369, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, 286331152
+ ret i1 %2
+}
+
+define i1 @uge_22222222(i32 noundef %0) {
+; GISEL-LABEL: uge_22222222:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #572662306 // =0x22222222
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: uge_22222222:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #8737 // =0x2221
+; SDAG-NEXT: movk w8, #8738, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, 572662305
+ ret i1 %2
+}
+
+define i1 @uge_33333333(i32 noundef %0) {
+; GISEL-LABEL: uge_33333333:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #858993459 // =0x33333333
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: uge_33333333:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #13106 // =0x3332
+; SDAG-NEXT: movk w8, #13107, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, 858993458
+ ret i1 %2
+}
+
+define i1 @uge_44444444(i32 noundef %0) {
+; GISEL-LABEL: uge_44444444:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: uge_44444444:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #17475 // =0x4443
+; SDAG-NEXT: movk w8, #17476, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, 1145324611
+ ret i1 %2
+}
+
+define i1 @uge_55555555(i32 noundef %0) {
+; GISEL-LABEL: uge_55555555:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: uge_55555555:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #21844 // =0x5554
+; SDAG-NEXT: movk w8, #21845, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, 1431655764
+ ret i1 %2
+}
+
+define i1 @uge_66666666(i32 noundef %0) {
+; GISEL-LABEL: uge_66666666:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: uge_66666666:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #26213 // =0x6665
+; SDAG-NEXT: movk w8, #26214, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, 1717986917
+ ret i1 %2
+}
+
+define i1 @uge_77777777(i32 noundef %0) {
+; GISEL-LABEL: uge_77777777:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: uge_77777777:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #30582 // =0x7776
+; SDAG-NEXT: movk w8, #30583, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, 2004318070
+ ret i1 %2
+}
+
+define i1 @uge_88888888(i32 noundef %0) {
+; GISEL-LABEL: uge_88888888:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: uge_88888888:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #34951 // =0x8887
+; SDAG-NEXT: movk w8, #34952, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, -2004318073
+ ret i1 %2
+}
+
+define i1 @uge_99999999(i32 noundef %0) {
+; GISEL-LABEL: uge_99999999:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: uge_99999999:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #39320 // =0x9998
+; SDAG-NEXT: movk w8, #39321, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, -1717986920
+ ret i1 %2
+}
+
+define i1 @sle_11111111(i32 noundef %0) {
+; GISEL-LABEL: sle_11111111:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #286331153 // =0x11111111
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, le
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sle_11111111:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #4370 // =0x1112
+; SDAG-NEXT: movk w8, #4369, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lt
+; SDAG-NEXT: ret
+ %2 = icmp slt i32 %0, 286331154
+ ret i1 %2
+}
+
+define i1 @sle_22222222(i32 noundef %0) {
+; GISEL-LABEL: sle_22222222:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #572662306 // =0x22222222
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, le
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sle_22222222:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #8739 // =0x2223
+; SDAG-NEXT: movk w8, #8738, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lt
+; SDAG-NEXT: ret
+ %2 = icmp slt i32 %0, 572662307
+ ret i1 %2
+}
+
+define i1 @sle_33333333(i32 noundef %0) {
+; GISEL-LABEL: sle_33333333:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #858993459 // =0x33333333
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, le
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sle_33333333:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #13108 // =0x3334
+; SDAG-NEXT: movk w8, #13107, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lt
+; SDAG-NEXT: ret
+ %2 = icmp slt i32 %0, 858993460
+ ret i1 %2
+}
+
+define i1 @sle_44444444(i32 noundef %0) {
+; GISEL-LABEL: sle_44444444:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, le
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sle_44444444:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #17477 // =0x4445
+; SDAG-NEXT: movk w8, #17476, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lt
+; SDAG-NEXT: ret
+ %2 = icmp slt i32 %0, 1145324613
+ ret i1 %2
+}
+
+define i1 @sle_55555555(i32 noundef %0) {
+; GISEL-LABEL: sle_55555555:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, le
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sle_55555555:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #21846 // =0x5556
+; SDAG-NEXT: movk w8, #21845, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lt
+; SDAG-NEXT: ret
+ %2 = icmp slt i32 %0, 1431655766
+ ret i1 %2
+}
+
+define i1 @sle_66666666(i32 noundef %0) {
+; GISEL-LABEL: sle_66666666:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, le
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sle_66666666:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #26215 // =0x6667
+; SDAG-NEXT: movk w8, #26214, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lt
+; SDAG-NEXT: ret
+ %2 = icmp slt i32 %0, 1717986919
+ ret i1 %2
+}
+
+define i1 @sle_77777777(i32 noundef %0) {
+; GISEL-LABEL: sle_77777777:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, le
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sle_77777777:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #30584 // =0x7778
+; SDAG-NEXT: movk w8, #30583, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lt
+; SDAG-NEXT: ret
+ %2 = icmp slt i32 %0, 2004318072
+ ret i1 %2
+}
+
+define i1 @sle_88888888(i32 noundef %0) {
+; GISEL-LABEL: sle_88888888:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sle_88888888:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #34953 // =0x8889
+; SDAG-NEXT: movk w8, #34952, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, -2004318071
+ ret i1 %2
+}
+
+define i1 @sle_99999999(i32 noundef %0) {
+; GISEL-LABEL: sle_99999999:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ls
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sle_99999999:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #39322 // =0x999a
+; SDAG-NEXT: movk w8, #39321, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, lo
+; SDAG-NEXT: ret
+ %2 = icmp ult i32 %0, -1717986918
+ ret i1 %2
+}
+
+define i1 @sge_11111111(i32 noundef %0) {
+; GISEL-LABEL: sge_11111111:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #286331153 // =0x11111111
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ge
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sge_11111111:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #4368 // =0x1110
+; SDAG-NEXT: movk w8, #4369, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, gt
+; SDAG-NEXT: ret
+ %2 = icmp sgt i32 %0, 286331152
+ ret i1 %2
+}
+
+define i1 @sge_22222222(i32 noundef %0) {
+; GISEL-LABEL: sge_22222222:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #572662306 // =0x22222222
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ge
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sge_22222222:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #8737 // =0x2221
+; SDAG-NEXT: movk w8, #8738, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, gt
+; SDAG-NEXT: ret
+ %2 = icmp sgt i32 %0, 572662305
+ ret i1 %2
+}
+
+define i1 @sge_33333333(i32 noundef %0) {
+; GISEL-LABEL: sge_33333333:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #858993459 // =0x33333333
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ge
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sge_33333333:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #13106 // =0x3332
+; SDAG-NEXT: movk w8, #13107, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, gt
+; SDAG-NEXT: ret
+ %2 = icmp sgt i32 %0, 858993458
+ ret i1 %2
+}
+
+define i1 @sge_44444444(i32 noundef %0) {
+; GISEL-LABEL: sge_44444444:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ge
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sge_44444444:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #17475 // =0x4443
+; SDAG-NEXT: movk w8, #17476, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, gt
+; SDAG-NEXT: ret
+ %2 = icmp sgt i32 %0, 1145324611
+ ret i1 %2
+}
+
+define i1 @sge_55555555(i32 noundef %0) {
+; GISEL-LABEL: sge_55555555:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ge
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sge_55555555:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #21844 // =0x5554
+; SDAG-NEXT: movk w8, #21845, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, gt
+; SDAG-NEXT: ret
+ %2 = icmp sgt i32 %0, 1431655764
+ ret i1 %2
+}
+
+define i1 @sge_66666666(i32 noundef %0) {
+; GISEL-LABEL: sge_66666666:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ge
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sge_66666666:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #26213 // =0x6665
+; SDAG-NEXT: movk w8, #26214, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, gt
+; SDAG-NEXT: ret
+ %2 = icmp sgt i32 %0, 1717986917
+ ret i1 %2
+}
+
+define i1 @sge_77777777(i32 noundef %0) {
+; GISEL-LABEL: sge_77777777:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, ge
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sge_77777777:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #30582 // =0x7776
+; SDAG-NEXT: movk w8, #30583, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, gt
+; SDAG-NEXT: ret
+ %2 = icmp sgt i32 %0, 2004318070
+ ret i1 %2
+}
+
+define i1 @sge_88888888(i32 noundef %0) {
+; GISEL-LABEL: sge_88888888:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sge_88888888:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #34951 // =0x8887
+; SDAG-NEXT: movk w8, #34952, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, -2004318073
+ ret i1 %2
+}
+
+define i1 @sge_99999999(i32 noundef %0) {
+; GISEL-LABEL: sge_99999999:
+; GISEL: // %bb.0:
+; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
+; GISEL-NEXT: cmp w0, w8
+; GISEL-NEXT: cset w0, hs
+; GISEL-NEXT: ret
+;
+; SDAG-LABEL: sge_99999999:
+; SDAG: // %bb.0:
+; SDAG-NEXT: mov w8, #39320 // =0x9998
+; SDAG-NEXT: movk w8, #39321, lsl #16
+; SDAG-NEXT: cmp w0, w8
+; SDAG-NEXT: cset w0, hi
+; SDAG-NEXT: ret
+ %2 = icmp ugt i32 %0, -1717986920
+ ret i1 %2
+}
>From f3983782b639e3959533a294160e3e581a901cf3 Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor at mac.com>
Date: Wed, 28 Feb 2024 15:13:57 -0500
Subject: [PATCH 3/5] Rename values in testcase.
---
llvm/test/CodeGen/AArch64/icmp-cst.ll | 216 +++++++++++++-------------
1 file changed, 108 insertions(+), 108 deletions(-)
diff --git a/llvm/test/CodeGen/AArch64/icmp-cst.ll b/llvm/test/CodeGen/AArch64/icmp-cst.ll
index e3768c1870c26..71ab1e681e5e4 100644
--- a/llvm/test/CodeGen/AArch64/icmp-cst.ll
+++ b/llvm/test/CodeGen/AArch64/icmp-cst.ll
@@ -2,7 +2,7 @@
; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck --check-prefix=GISEL %s
; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=0 < %s | FileCheck --check-prefix=SDAG %s
-define i1 @ule_11111111(i32 noundef %0) {
+define i1 @ule_11111111(i32 noundef %in) {
; GISEL-LABEL: ule_11111111:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #286331153 // =0x11111111
@@ -17,11 +17,11 @@ define i1 @ule_11111111(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, 286331154
- ret i1 %2
+ %out = icmp ult i32 %in, 286331154
+ ret i1 %out
}
-define i1 @ule_22222222(i32 noundef %0) {
+define i1 @ule_22222222(i32 noundef %in) {
; GISEL-LABEL: ule_22222222:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #572662306 // =0x22222222
@@ -36,11 +36,11 @@ define i1 @ule_22222222(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, 572662307
- ret i1 %2
+ %out = icmp ult i32 %in, 572662307
+ ret i1 %out
}
-define i1 @ule_33333333(i32 noundef %0) {
+define i1 @ule_33333333(i32 noundef %in) {
; GISEL-LABEL: ule_33333333:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #858993459 // =0x33333333
@@ -55,11 +55,11 @@ define i1 @ule_33333333(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, 858993460
- ret i1 %2
+ %out = icmp ult i32 %in, 858993460
+ ret i1 %out
}
-define i1 @ule_44444444(i32 noundef %0) {
+define i1 @ule_44444444(i32 noundef %in) {
; GISEL-LABEL: ule_44444444:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
@@ -74,11 +74,11 @@ define i1 @ule_44444444(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, 1145324613
- ret i1 %2
+ %out = icmp ult i32 %in, 1145324613
+ ret i1 %out
}
-define i1 @ule_55555555(i32 noundef %0) {
+define i1 @ule_55555555(i32 noundef %in) {
; GISEL-LABEL: ule_55555555:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
@@ -93,11 +93,11 @@ define i1 @ule_55555555(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, 1431655766
- ret i1 %2
+ %out = icmp ult i32 %in, 1431655766
+ ret i1 %out
}
-define i1 @ule_66666666(i32 noundef %0) {
+define i1 @ule_66666666(i32 noundef %in) {
; GISEL-LABEL: ule_66666666:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
@@ -112,11 +112,11 @@ define i1 @ule_66666666(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, 1717986919
- ret i1 %2
+ %out = icmp ult i32 %in, 1717986919
+ ret i1 %out
}
-define i1 @ule_77777777(i32 noundef %0) {
+define i1 @ule_77777777(i32 noundef %in) {
; GISEL-LABEL: ule_77777777:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
@@ -131,11 +131,11 @@ define i1 @ule_77777777(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, 2004318072
- ret i1 %2
+ %out = icmp ult i32 %in, 2004318072
+ ret i1 %out
}
-define i1 @ule_88888888(i32 noundef %0) {
+define i1 @ule_88888888(i32 noundef %in) {
; GISEL-LABEL: ule_88888888:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
@@ -150,11 +150,11 @@ define i1 @ule_88888888(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, -2004318071
- ret i1 %2
+ %out = icmp ult i32 %in, -2004318071
+ ret i1 %out
}
-define i1 @ule_99999999(i32 noundef %0) {
+define i1 @ule_99999999(i32 noundef %in) {
; GISEL-LABEL: ule_99999999:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
@@ -169,11 +169,11 @@ define i1 @ule_99999999(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, -1717986918
- ret i1 %2
+ %out = icmp ult i32 %in, -1717986918
+ ret i1 %out
}
-define i1 @uge_11111111(i32 noundef %0) {
+define i1 @uge_11111111(i32 noundef %in) {
; GISEL-LABEL: uge_11111111:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #286331153 // =0x11111111
@@ -188,11 +188,11 @@ define i1 @uge_11111111(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, 286331152
- ret i1 %2
+ %out = icmp ugt i32 %in, 286331152
+ ret i1 %out
}
-define i1 @uge_22222222(i32 noundef %0) {
+define i1 @uge_22222222(i32 noundef %in) {
; GISEL-LABEL: uge_22222222:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #572662306 // =0x22222222
@@ -207,11 +207,11 @@ define i1 @uge_22222222(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, 572662305
- ret i1 %2
+ %out = icmp ugt i32 %in, 572662305
+ ret i1 %out
}
-define i1 @uge_33333333(i32 noundef %0) {
+define i1 @uge_33333333(i32 noundef %in) {
; GISEL-LABEL: uge_33333333:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #858993459 // =0x33333333
@@ -226,11 +226,11 @@ define i1 @uge_33333333(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, 858993458
- ret i1 %2
+ %out = icmp ugt i32 %in, 858993458
+ ret i1 %out
}
-define i1 @uge_44444444(i32 noundef %0) {
+define i1 @uge_44444444(i32 noundef %in) {
; GISEL-LABEL: uge_44444444:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
@@ -245,11 +245,11 @@ define i1 @uge_44444444(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, 1145324611
- ret i1 %2
+ %out = icmp ugt i32 %in, 1145324611
+ ret i1 %out
}
-define i1 @uge_55555555(i32 noundef %0) {
+define i1 @uge_55555555(i32 noundef %in) {
; GISEL-LABEL: uge_55555555:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
@@ -264,11 +264,11 @@ define i1 @uge_55555555(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, 1431655764
- ret i1 %2
+ %out = icmp ugt i32 %in, 1431655764
+ ret i1 %out
}
-define i1 @uge_66666666(i32 noundef %0) {
+define i1 @uge_66666666(i32 noundef %in) {
; GISEL-LABEL: uge_66666666:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
@@ -283,11 +283,11 @@ define i1 @uge_66666666(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, 1717986917
- ret i1 %2
+ %out = icmp ugt i32 %in, 1717986917
+ ret i1 %out
}
-define i1 @uge_77777777(i32 noundef %0) {
+define i1 @uge_77777777(i32 noundef %in) {
; GISEL-LABEL: uge_77777777:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
@@ -302,11 +302,11 @@ define i1 @uge_77777777(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, 2004318070
- ret i1 %2
+ %out = icmp ugt i32 %in, 2004318070
+ ret i1 %out
}
-define i1 @uge_88888888(i32 noundef %0) {
+define i1 @uge_88888888(i32 noundef %in) {
; GISEL-LABEL: uge_88888888:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
@@ -321,11 +321,11 @@ define i1 @uge_88888888(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, -2004318073
- ret i1 %2
+ %out = icmp ugt i32 %in, -2004318073
+ ret i1 %out
}
-define i1 @uge_99999999(i32 noundef %0) {
+define i1 @uge_99999999(i32 noundef %in) {
; GISEL-LABEL: uge_99999999:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
@@ -340,11 +340,11 @@ define i1 @uge_99999999(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, -1717986920
- ret i1 %2
+ %out = icmp ugt i32 %in, -1717986920
+ ret i1 %out
}
-define i1 @sle_11111111(i32 noundef %0) {
+define i1 @sle_11111111(i32 noundef %in) {
; GISEL-LABEL: sle_11111111:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #286331153 // =0x11111111
@@ -359,11 +359,11 @@ define i1 @sle_11111111(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lt
; SDAG-NEXT: ret
- %2 = icmp slt i32 %0, 286331154
- ret i1 %2
+ %out = icmp slt i32 %in, 286331154
+ ret i1 %out
}
-define i1 @sle_22222222(i32 noundef %0) {
+define i1 @sle_22222222(i32 noundef %in) {
; GISEL-LABEL: sle_22222222:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #572662306 // =0x22222222
@@ -378,11 +378,11 @@ define i1 @sle_22222222(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lt
; SDAG-NEXT: ret
- %2 = icmp slt i32 %0, 572662307
- ret i1 %2
+ %out = icmp slt i32 %in, 572662307
+ ret i1 %out
}
-define i1 @sle_33333333(i32 noundef %0) {
+define i1 @sle_33333333(i32 noundef %in) {
; GISEL-LABEL: sle_33333333:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #858993459 // =0x33333333
@@ -397,11 +397,11 @@ define i1 @sle_33333333(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lt
; SDAG-NEXT: ret
- %2 = icmp slt i32 %0, 858993460
- ret i1 %2
+ %out = icmp slt i32 %in, 858993460
+ ret i1 %out
}
-define i1 @sle_44444444(i32 noundef %0) {
+define i1 @sle_44444444(i32 noundef %in) {
; GISEL-LABEL: sle_44444444:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
@@ -416,11 +416,11 @@ define i1 @sle_44444444(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lt
; SDAG-NEXT: ret
- %2 = icmp slt i32 %0, 1145324613
- ret i1 %2
+ %out = icmp slt i32 %in, 1145324613
+ ret i1 %out
}
-define i1 @sle_55555555(i32 noundef %0) {
+define i1 @sle_55555555(i32 noundef %in) {
; GISEL-LABEL: sle_55555555:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
@@ -435,11 +435,11 @@ define i1 @sle_55555555(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lt
; SDAG-NEXT: ret
- %2 = icmp slt i32 %0, 1431655766
- ret i1 %2
+ %out = icmp slt i32 %in, 1431655766
+ ret i1 %out
}
-define i1 @sle_66666666(i32 noundef %0) {
+define i1 @sle_66666666(i32 noundef %in) {
; GISEL-LABEL: sle_66666666:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
@@ -454,11 +454,11 @@ define i1 @sle_66666666(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lt
; SDAG-NEXT: ret
- %2 = icmp slt i32 %0, 1717986919
- ret i1 %2
+ %out = icmp slt i32 %in, 1717986919
+ ret i1 %out
}
-define i1 @sle_77777777(i32 noundef %0) {
+define i1 @sle_77777777(i32 noundef %in) {
; GISEL-LABEL: sle_77777777:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
@@ -473,11 +473,11 @@ define i1 @sle_77777777(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lt
; SDAG-NEXT: ret
- %2 = icmp slt i32 %0, 2004318072
- ret i1 %2
+ %out = icmp slt i32 %in, 2004318072
+ ret i1 %out
}
-define i1 @sle_88888888(i32 noundef %0) {
+define i1 @sle_88888888(i32 noundef %in) {
; GISEL-LABEL: sle_88888888:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
@@ -492,11 +492,11 @@ define i1 @sle_88888888(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, -2004318071
- ret i1 %2
+ %out = icmp ult i32 %in, -2004318071
+ ret i1 %out
}
-define i1 @sle_99999999(i32 noundef %0) {
+define i1 @sle_99999999(i32 noundef %in) {
; GISEL-LABEL: sle_99999999:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
@@ -511,11 +511,11 @@ define i1 @sle_99999999(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, lo
; SDAG-NEXT: ret
- %2 = icmp ult i32 %0, -1717986918
- ret i1 %2
+ %out = icmp ult i32 %in, -1717986918
+ ret i1 %out
}
-define i1 @sge_11111111(i32 noundef %0) {
+define i1 @sge_11111111(i32 noundef %in) {
; GISEL-LABEL: sge_11111111:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #286331153 // =0x11111111
@@ -530,11 +530,11 @@ define i1 @sge_11111111(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, gt
; SDAG-NEXT: ret
- %2 = icmp sgt i32 %0, 286331152
- ret i1 %2
+ %out = icmp sgt i32 %in, 286331152
+ ret i1 %out
}
-define i1 @sge_22222222(i32 noundef %0) {
+define i1 @sge_22222222(i32 noundef %in) {
; GISEL-LABEL: sge_22222222:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #572662306 // =0x22222222
@@ -549,11 +549,11 @@ define i1 @sge_22222222(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, gt
; SDAG-NEXT: ret
- %2 = icmp sgt i32 %0, 572662305
- ret i1 %2
+ %out = icmp sgt i32 %in, 572662305
+ ret i1 %out
}
-define i1 @sge_33333333(i32 noundef %0) {
+define i1 @sge_33333333(i32 noundef %in) {
; GISEL-LABEL: sge_33333333:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #858993459 // =0x33333333
@@ -568,11 +568,11 @@ define i1 @sge_33333333(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, gt
; SDAG-NEXT: ret
- %2 = icmp sgt i32 %0, 858993458
- ret i1 %2
+ %out = icmp sgt i32 %in, 858993458
+ ret i1 %out
}
-define i1 @sge_44444444(i32 noundef %0) {
+define i1 @sge_44444444(i32 noundef %in) {
; GISEL-LABEL: sge_44444444:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
@@ -587,11 +587,11 @@ define i1 @sge_44444444(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, gt
; SDAG-NEXT: ret
- %2 = icmp sgt i32 %0, 1145324611
- ret i1 %2
+ %out = icmp sgt i32 %in, 1145324611
+ ret i1 %out
}
-define i1 @sge_55555555(i32 noundef %0) {
+define i1 @sge_55555555(i32 noundef %in) {
; GISEL-LABEL: sge_55555555:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
@@ -606,11 +606,11 @@ define i1 @sge_55555555(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, gt
; SDAG-NEXT: ret
- %2 = icmp sgt i32 %0, 1431655764
- ret i1 %2
+ %out = icmp sgt i32 %in, 1431655764
+ ret i1 %out
}
-define i1 @sge_66666666(i32 noundef %0) {
+define i1 @sge_66666666(i32 noundef %in) {
; GISEL-LABEL: sge_66666666:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
@@ -625,11 +625,11 @@ define i1 @sge_66666666(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, gt
; SDAG-NEXT: ret
- %2 = icmp sgt i32 %0, 1717986917
- ret i1 %2
+ %out = icmp sgt i32 %in, 1717986917
+ ret i1 %out
}
-define i1 @sge_77777777(i32 noundef %0) {
+define i1 @sge_77777777(i32 noundef %in) {
; GISEL-LABEL: sge_77777777:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
@@ -644,11 +644,11 @@ define i1 @sge_77777777(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, gt
; SDAG-NEXT: ret
- %2 = icmp sgt i32 %0, 2004318070
- ret i1 %2
+ %out = icmp sgt i32 %in, 2004318070
+ ret i1 %out
}
-define i1 @sge_88888888(i32 noundef %0) {
+define i1 @sge_88888888(i32 noundef %in) {
; GISEL-LABEL: sge_88888888:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
@@ -663,11 +663,11 @@ define i1 @sge_88888888(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, -2004318073
- ret i1 %2
+ %out = icmp ugt i32 %in, -2004318073
+ ret i1 %out
}
-define i1 @sge_99999999(i32 noundef %0) {
+define i1 @sge_99999999(i32 noundef %in) {
; GISEL-LABEL: sge_99999999:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
@@ -682,6 +682,6 @@ define i1 @sge_99999999(i32 noundef %0) {
; SDAG-NEXT: cmp w0, w8
; SDAG-NEXT: cset w0, hi
; SDAG-NEXT: ret
- %2 = icmp ugt i32 %0, -1717986920
- ret i1 %2
+ %out = icmp ugt i32 %in, -1717986920
+ ret i1 %out
}
>From 969bf72a2f1b7c068d05ec084952a7430cccf570 Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor at mac.com>
Date: Wed, 28 Feb 2024 15:18:20 -0500
Subject: [PATCH 4/5] Improve CHECK prefixes.
---
llvm/test/CodeGen/AArch64/icmp-cst.ll | 1012 ++++++++++++-------------
1 file changed, 506 insertions(+), 506 deletions(-)
diff --git a/llvm/test/CodeGen/AArch64/icmp-cst.ll b/llvm/test/CodeGen/AArch64/icmp-cst.ll
index 71ab1e681e5e4..b6f452bb42cec 100644
--- a/llvm/test/CodeGen/AArch64/icmp-cst.ll
+++ b/llvm/test/CodeGen/AArch64/icmp-cst.ll
@@ -1,687 +1,687 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck --check-prefix=GISEL %s
-; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=0 < %s | FileCheck --check-prefix=SDAG %s
+; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=0 < %s | FileCheck %s --check-prefix=CHECK-SD
+; RUN: llc -mtriple=aarch64-linux-gnu -global-isel=1 < %s | FileCheck %s --check-prefix=CHECK-GI
define i1 @ule_11111111(i32 noundef %in) {
-; GISEL-LABEL: ule_11111111:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #286331153 // =0x11111111
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: ule_11111111:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #4370 // =0x1112
-; SDAG-NEXT: movk w8, #4369, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: ule_11111111:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #4370 // =0x1112
+; CHECK-SD-NEXT: movk w8, #4369, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: ule_11111111:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #286331153 // =0x11111111
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, 286331154
ret i1 %out
}
define i1 @ule_22222222(i32 noundef %in) {
-; GISEL-LABEL: ule_22222222:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #572662306 // =0x22222222
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: ule_22222222:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #8739 // =0x2223
-; SDAG-NEXT: movk w8, #8738, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: ule_22222222:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #8739 // =0x2223
+; CHECK-SD-NEXT: movk w8, #8738, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: ule_22222222:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #572662306 // =0x22222222
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, 572662307
ret i1 %out
}
define i1 @ule_33333333(i32 noundef %in) {
-; GISEL-LABEL: ule_33333333:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #858993459 // =0x33333333
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: ule_33333333:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #13108 // =0x3334
-; SDAG-NEXT: movk w8, #13107, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: ule_33333333:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #13108 // =0x3334
+; CHECK-SD-NEXT: movk w8, #13107, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: ule_33333333:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #858993459 // =0x33333333
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, 858993460
ret i1 %out
}
define i1 @ule_44444444(i32 noundef %in) {
-; GISEL-LABEL: ule_44444444:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: ule_44444444:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #17477 // =0x4445
-; SDAG-NEXT: movk w8, #17476, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: ule_44444444:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #17477 // =0x4445
+; CHECK-SD-NEXT: movk w8, #17476, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: ule_44444444:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1145324612 // =0x44444444
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, 1145324613
ret i1 %out
}
define i1 @ule_55555555(i32 noundef %in) {
-; GISEL-LABEL: ule_55555555:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: ule_55555555:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #21846 // =0x5556
-; SDAG-NEXT: movk w8, #21845, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: ule_55555555:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #21846 // =0x5556
+; CHECK-SD-NEXT: movk w8, #21845, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: ule_55555555:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1431655765 // =0x55555555
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, 1431655766
ret i1 %out
}
define i1 @ule_66666666(i32 noundef %in) {
-; GISEL-LABEL: ule_66666666:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: ule_66666666:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #26215 // =0x6667
-; SDAG-NEXT: movk w8, #26214, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: ule_66666666:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #26215 // =0x6667
+; CHECK-SD-NEXT: movk w8, #26214, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: ule_66666666:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1717986918 // =0x66666666
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, 1717986919
ret i1 %out
}
define i1 @ule_77777777(i32 noundef %in) {
-; GISEL-LABEL: ule_77777777:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: ule_77777777:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #30584 // =0x7778
-; SDAG-NEXT: movk w8, #30583, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: ule_77777777:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #30584 // =0x7778
+; CHECK-SD-NEXT: movk w8, #30583, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: ule_77777777:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #2004318071 // =0x77777777
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, 2004318072
ret i1 %out
}
define i1 @ule_88888888(i32 noundef %in) {
-; GISEL-LABEL: ule_88888888:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: ule_88888888:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #34953 // =0x8889
-; SDAG-NEXT: movk w8, #34952, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: ule_88888888:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #34953 // =0x8889
+; CHECK-SD-NEXT: movk w8, #34952, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: ule_88888888:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #-2004318072 // =0x88888888
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, -2004318071
ret i1 %out
}
define i1 @ule_99999999(i32 noundef %in) {
-; GISEL-LABEL: ule_99999999:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: ule_99999999:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #39322 // =0x999a
-; SDAG-NEXT: movk w8, #39321, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: ule_99999999:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #39322 // =0x999a
+; CHECK-SD-NEXT: movk w8, #39321, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: ule_99999999:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #-1717986919 // =0x99999999
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, -1717986918
ret i1 %out
}
define i1 @uge_11111111(i32 noundef %in) {
-; GISEL-LABEL: uge_11111111:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #286331153 // =0x11111111
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: uge_11111111:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #4368 // =0x1110
-; SDAG-NEXT: movk w8, #4369, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: uge_11111111:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #4368 // =0x1110
+; CHECK-SD-NEXT: movk w8, #4369, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: uge_11111111:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #286331153 // =0x11111111
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, 286331152
ret i1 %out
}
define i1 @uge_22222222(i32 noundef %in) {
-; GISEL-LABEL: uge_22222222:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #572662306 // =0x22222222
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: uge_22222222:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #8737 // =0x2221
-; SDAG-NEXT: movk w8, #8738, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: uge_22222222:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #8737 // =0x2221
+; CHECK-SD-NEXT: movk w8, #8738, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: uge_22222222:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #572662306 // =0x22222222
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, 572662305
ret i1 %out
}
define i1 @uge_33333333(i32 noundef %in) {
-; GISEL-LABEL: uge_33333333:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #858993459 // =0x33333333
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: uge_33333333:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #13106 // =0x3332
-; SDAG-NEXT: movk w8, #13107, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: uge_33333333:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #13106 // =0x3332
+; CHECK-SD-NEXT: movk w8, #13107, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: uge_33333333:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #858993459 // =0x33333333
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, 858993458
ret i1 %out
}
define i1 @uge_44444444(i32 noundef %in) {
-; GISEL-LABEL: uge_44444444:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: uge_44444444:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #17475 // =0x4443
-; SDAG-NEXT: movk w8, #17476, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: uge_44444444:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #17475 // =0x4443
+; CHECK-SD-NEXT: movk w8, #17476, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: uge_44444444:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1145324612 // =0x44444444
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, 1145324611
ret i1 %out
}
define i1 @uge_55555555(i32 noundef %in) {
-; GISEL-LABEL: uge_55555555:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: uge_55555555:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #21844 // =0x5554
-; SDAG-NEXT: movk w8, #21845, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: uge_55555555:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #21844 // =0x5554
+; CHECK-SD-NEXT: movk w8, #21845, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: uge_55555555:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1431655765 // =0x55555555
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, 1431655764
ret i1 %out
}
define i1 @uge_66666666(i32 noundef %in) {
-; GISEL-LABEL: uge_66666666:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: uge_66666666:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #26213 // =0x6665
-; SDAG-NEXT: movk w8, #26214, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: uge_66666666:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #26213 // =0x6665
+; CHECK-SD-NEXT: movk w8, #26214, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: uge_66666666:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1717986918 // =0x66666666
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, 1717986917
ret i1 %out
}
define i1 @uge_77777777(i32 noundef %in) {
-; GISEL-LABEL: uge_77777777:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: uge_77777777:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #30582 // =0x7776
-; SDAG-NEXT: movk w8, #30583, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: uge_77777777:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #30582 // =0x7776
+; CHECK-SD-NEXT: movk w8, #30583, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: uge_77777777:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #2004318071 // =0x77777777
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, 2004318070
ret i1 %out
}
define i1 @uge_88888888(i32 noundef %in) {
-; GISEL-LABEL: uge_88888888:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: uge_88888888:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #34951 // =0x8887
-; SDAG-NEXT: movk w8, #34952, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: uge_88888888:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #34951 // =0x8887
+; CHECK-SD-NEXT: movk w8, #34952, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: uge_88888888:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #-2004318072 // =0x88888888
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, -2004318073
ret i1 %out
}
define i1 @uge_99999999(i32 noundef %in) {
-; GISEL-LABEL: uge_99999999:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: uge_99999999:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #39320 // =0x9998
-; SDAG-NEXT: movk w8, #39321, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: uge_99999999:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #39320 // =0x9998
+; CHECK-SD-NEXT: movk w8, #39321, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: uge_99999999:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #-1717986919 // =0x99999999
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, -1717986920
ret i1 %out
}
define i1 @sle_11111111(i32 noundef %in) {
-; GISEL-LABEL: sle_11111111:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #286331153 // =0x11111111
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, le
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sle_11111111:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #4370 // =0x1112
-; SDAG-NEXT: movk w8, #4369, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sle_11111111:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #4370 // =0x1112
+; CHECK-SD-NEXT: movk w8, #4369, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sle_11111111:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #286331153 // =0x11111111
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, le
+; CHECK-GI-NEXT: ret
%out = icmp slt i32 %in, 286331154
ret i1 %out
}
define i1 @sle_22222222(i32 noundef %in) {
-; GISEL-LABEL: sle_22222222:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #572662306 // =0x22222222
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, le
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sle_22222222:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #8739 // =0x2223
-; SDAG-NEXT: movk w8, #8738, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sle_22222222:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #8739 // =0x2223
+; CHECK-SD-NEXT: movk w8, #8738, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sle_22222222:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #572662306 // =0x22222222
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, le
+; CHECK-GI-NEXT: ret
%out = icmp slt i32 %in, 572662307
ret i1 %out
}
define i1 @sle_33333333(i32 noundef %in) {
-; GISEL-LABEL: sle_33333333:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #858993459 // =0x33333333
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, le
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sle_33333333:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #13108 // =0x3334
-; SDAG-NEXT: movk w8, #13107, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sle_33333333:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #13108 // =0x3334
+; CHECK-SD-NEXT: movk w8, #13107, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sle_33333333:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #858993459 // =0x33333333
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, le
+; CHECK-GI-NEXT: ret
%out = icmp slt i32 %in, 858993460
ret i1 %out
}
define i1 @sle_44444444(i32 noundef %in) {
-; GISEL-LABEL: sle_44444444:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, le
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sle_44444444:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #17477 // =0x4445
-; SDAG-NEXT: movk w8, #17476, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sle_44444444:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #17477 // =0x4445
+; CHECK-SD-NEXT: movk w8, #17476, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sle_44444444:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1145324612 // =0x44444444
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, le
+; CHECK-GI-NEXT: ret
%out = icmp slt i32 %in, 1145324613
ret i1 %out
}
define i1 @sle_55555555(i32 noundef %in) {
-; GISEL-LABEL: sle_55555555:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, le
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sle_55555555:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #21846 // =0x5556
-; SDAG-NEXT: movk w8, #21845, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sle_55555555:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #21846 // =0x5556
+; CHECK-SD-NEXT: movk w8, #21845, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sle_55555555:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1431655765 // =0x55555555
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, le
+; CHECK-GI-NEXT: ret
%out = icmp slt i32 %in, 1431655766
ret i1 %out
}
define i1 @sle_66666666(i32 noundef %in) {
-; GISEL-LABEL: sle_66666666:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, le
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sle_66666666:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #26215 // =0x6667
-; SDAG-NEXT: movk w8, #26214, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sle_66666666:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #26215 // =0x6667
+; CHECK-SD-NEXT: movk w8, #26214, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sle_66666666:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1717986918 // =0x66666666
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, le
+; CHECK-GI-NEXT: ret
%out = icmp slt i32 %in, 1717986919
ret i1 %out
}
define i1 @sle_77777777(i32 noundef %in) {
-; GISEL-LABEL: sle_77777777:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, le
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sle_77777777:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #30584 // =0x7778
-; SDAG-NEXT: movk w8, #30583, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sle_77777777:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #30584 // =0x7778
+; CHECK-SD-NEXT: movk w8, #30583, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sle_77777777:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #2004318071 // =0x77777777
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, le
+; CHECK-GI-NEXT: ret
%out = icmp slt i32 %in, 2004318072
ret i1 %out
}
define i1 @sle_88888888(i32 noundef %in) {
-; GISEL-LABEL: sle_88888888:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sle_88888888:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #34953 // =0x8889
-; SDAG-NEXT: movk w8, #34952, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sle_88888888:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #34953 // =0x8889
+; CHECK-SD-NEXT: movk w8, #34952, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sle_88888888:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #-2004318072 // =0x88888888
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, -2004318071
ret i1 %out
}
define i1 @sle_99999999(i32 noundef %in) {
-; GISEL-LABEL: sle_99999999:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ls
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sle_99999999:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #39322 // =0x999a
-; SDAG-NEXT: movk w8, #39321, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, lo
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sle_99999999:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #39322 // =0x999a
+; CHECK-SD-NEXT: movk w8, #39321, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, lo
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sle_99999999:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #-1717986919 // =0x99999999
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ls
+; CHECK-GI-NEXT: ret
%out = icmp ult i32 %in, -1717986918
ret i1 %out
}
define i1 @sge_11111111(i32 noundef %in) {
-; GISEL-LABEL: sge_11111111:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #286331153 // =0x11111111
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ge
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sge_11111111:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #4368 // =0x1110
-; SDAG-NEXT: movk w8, #4369, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, gt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sge_11111111:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #4368 // =0x1110
+; CHECK-SD-NEXT: movk w8, #4369, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, gt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sge_11111111:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #286331153 // =0x11111111
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ge
+; CHECK-GI-NEXT: ret
%out = icmp sgt i32 %in, 286331152
ret i1 %out
}
define i1 @sge_22222222(i32 noundef %in) {
-; GISEL-LABEL: sge_22222222:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #572662306 // =0x22222222
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ge
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sge_22222222:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #8737 // =0x2221
-; SDAG-NEXT: movk w8, #8738, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, gt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sge_22222222:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #8737 // =0x2221
+; CHECK-SD-NEXT: movk w8, #8738, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, gt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sge_22222222:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #572662306 // =0x22222222
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ge
+; CHECK-GI-NEXT: ret
%out = icmp sgt i32 %in, 572662305
ret i1 %out
}
define i1 @sge_33333333(i32 noundef %in) {
-; GISEL-LABEL: sge_33333333:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #858993459 // =0x33333333
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ge
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sge_33333333:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #13106 // =0x3332
-; SDAG-NEXT: movk w8, #13107, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, gt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sge_33333333:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #13106 // =0x3332
+; CHECK-SD-NEXT: movk w8, #13107, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, gt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sge_33333333:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #858993459 // =0x33333333
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ge
+; CHECK-GI-NEXT: ret
%out = icmp sgt i32 %in, 858993458
ret i1 %out
}
define i1 @sge_44444444(i32 noundef %in) {
-; GISEL-LABEL: sge_44444444:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1145324612 // =0x44444444
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ge
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sge_44444444:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #17475 // =0x4443
-; SDAG-NEXT: movk w8, #17476, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, gt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sge_44444444:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #17475 // =0x4443
+; CHECK-SD-NEXT: movk w8, #17476, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, gt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sge_44444444:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1145324612 // =0x44444444
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ge
+; CHECK-GI-NEXT: ret
%out = icmp sgt i32 %in, 1145324611
ret i1 %out
}
define i1 @sge_55555555(i32 noundef %in) {
-; GISEL-LABEL: sge_55555555:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1431655765 // =0x55555555
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ge
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sge_55555555:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #21844 // =0x5554
-; SDAG-NEXT: movk w8, #21845, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, gt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sge_55555555:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #21844 // =0x5554
+; CHECK-SD-NEXT: movk w8, #21845, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, gt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sge_55555555:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1431655765 // =0x55555555
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ge
+; CHECK-GI-NEXT: ret
%out = icmp sgt i32 %in, 1431655764
ret i1 %out
}
define i1 @sge_66666666(i32 noundef %in) {
-; GISEL-LABEL: sge_66666666:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #1717986918 // =0x66666666
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ge
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sge_66666666:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #26213 // =0x6665
-; SDAG-NEXT: movk w8, #26214, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, gt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sge_66666666:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #26213 // =0x6665
+; CHECK-SD-NEXT: movk w8, #26214, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, gt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sge_66666666:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #1717986918 // =0x66666666
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ge
+; CHECK-GI-NEXT: ret
%out = icmp sgt i32 %in, 1717986917
ret i1 %out
}
define i1 @sge_77777777(i32 noundef %in) {
-; GISEL-LABEL: sge_77777777:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #2004318071 // =0x77777777
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, ge
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sge_77777777:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #30582 // =0x7776
-; SDAG-NEXT: movk w8, #30583, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, gt
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sge_77777777:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #30582 // =0x7776
+; CHECK-SD-NEXT: movk w8, #30583, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, gt
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sge_77777777:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #2004318071 // =0x77777777
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, ge
+; CHECK-GI-NEXT: ret
%out = icmp sgt i32 %in, 2004318070
ret i1 %out
}
define i1 @sge_88888888(i32 noundef %in) {
-; GISEL-LABEL: sge_88888888:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #-2004318072 // =0x88888888
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sge_88888888:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #34951 // =0x8887
-; SDAG-NEXT: movk w8, #34952, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sge_88888888:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #34951 // =0x8887
+; CHECK-SD-NEXT: movk w8, #34952, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sge_88888888:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #-2004318072 // =0x88888888
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, -2004318073
ret i1 %out
}
define i1 @sge_99999999(i32 noundef %in) {
-; GISEL-LABEL: sge_99999999:
-; GISEL: // %bb.0:
-; GISEL-NEXT: mov w8, #-1717986919 // =0x99999999
-; GISEL-NEXT: cmp w0, w8
-; GISEL-NEXT: cset w0, hs
-; GISEL-NEXT: ret
-;
-; SDAG-LABEL: sge_99999999:
-; SDAG: // %bb.0:
-; SDAG-NEXT: mov w8, #39320 // =0x9998
-; SDAG-NEXT: movk w8, #39321, lsl #16
-; SDAG-NEXT: cmp w0, w8
-; SDAG-NEXT: cset w0, hi
-; SDAG-NEXT: ret
+; CHECK-SD-LABEL: sge_99999999:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #39320 // =0x9998
+; CHECK-SD-NEXT: movk w8, #39321, lsl #16
+; CHECK-SD-NEXT: cmp w0, w8
+; CHECK-SD-NEXT: cset w0, hi
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: sge_99999999:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #-1717986919 // =0x99999999
+; CHECK-GI-NEXT: cmp w0, w8
+; CHECK-GI-NEXT: cset w0, hs
+; CHECK-GI-NEXT: ret
%out = icmp ugt i32 %in, -1717986920
ret i1 %out
}
>From 5abd24063914533479d21be716e34a26a91e9d84 Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor at mac.com>
Date: Sat, 1 Jun 2024 21:46:14 -0930
Subject: [PATCH 5/5] Generalize the instructions-to-materialize-immediate
check.
---
.../AArch64/GISel/AArch64PostLegalizerLowering.cpp | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
index 1bc8cb6c162dc..4a1977ba1a00f 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
@@ -19,6 +19,7 @@
///
//===----------------------------------------------------------------------===//
+#include "AArch64ExpandImm.h"
#include "AArch64GlobalISelUtils.h"
#include "AArch64PerfectShuffle.h"
#include "AArch64Subtarget.h"
@@ -636,9 +637,17 @@ tryAdjustICmpImmAndPred(Register RHS, CmpInst::Predicate P,
C = static_cast<uint32_t>(C);
if (isLegalArithImmed(C))
return {{C, P}};
- if (AArch64_AM::isLogicalImmediate(C, Size) &&
- !AArch64_AM::isLogicalImmediate(OriginalC, Size))
+
+ auto IsMaterializableInSingleInstruction = [=](uint64_t Imm) {
+ SmallVector<AArch64_IMM::ImmInsnModel> Insn;
+ AArch64_IMM::expandMOVImm(Imm, 32, Insn);
+ return Insn.size() == 1;
+ };
+
+ if (!IsMaterializableInSingleInstruction(OriginalC) &&
+ IsMaterializableInSingleInstruction(C))
return {{C, P}};
+
return std::nullopt;
}
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