[llvm] 8256c59 - Fix GCC Wparentheses warning. NFC.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2024-06-01T18:15:40+01:00
New Revision: 8256c593f67018e8d73dce714bedc3f4e6869db9

URL: https://github.com/llvm/llvm-project/commit/8256c593f67018e8d73dce714bedc3f4e6869db9
DIFF: https://github.com/llvm/llvm-project/commit/8256c593f67018e8d73dce714bedc3f4e6869db9.diff

LOG: Fix GCC Wparentheses warning. NFC.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
index 0f89fa557cd57..31f77be20f348 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
@@ -560,9 +560,9 @@ void applyExtUaddvToUaddlv(MachineInstr &MI, MachineRegisterInfo &MRI,
 // i32 add(i32 ext i8, i32 ext i8) => i32 ext(i16 add(i16 ext i8, i16 ext i8))
 bool matchPushAddSubExt(MachineInstr &MI, MachineRegisterInfo &MRI,
                         Register DstReg, Register SrcReg1, Register SrcReg2) {
-  assert(MI.getOpcode() == TargetOpcode::G_ADD ||
-         MI.getOpcode() == TargetOpcode::G_SUB &&
-             "Expected a G_ADD or G_SUB instruction\n");
+  assert((MI.getOpcode() == TargetOpcode::G_ADD ||
+          MI.getOpcode() == TargetOpcode::G_SUB) &&
+         "Expected a G_ADD or G_SUB instruction\n");
 
   // Deal with vector types only
   LLT DstTy = MRI.getType(DstReg);