[llvm] 0864501 - [GISel] Convert zext nneg to sext if it is cheaper (#93856)
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Sat Jun 1 00:02:46 PDT 2024
Author: Yingwei Zheng
Date: 2024-06-01T15:02:43+08:00
New Revision: 0864501b97a70ce7d6f1741514fae08eef7c237e
URL: https://github.com/llvm/llvm-project/commit/0864501b97a70ce7d6f1741514fae08eef7c237e
DIFF: https://github.com/llvm/llvm-project/commit/0864501b97a70ce7d6f1741514fae08eef7c237e.diff
LOG: [GISel] Convert zext nneg to sext if it is cheaper (#93856)
This patch converts `zext nneg` to `sext` on RISCV to use free sext.
---------
Co-authored-by: Thorsten Schütt <schuett at gmail.com>
Added:
llvm/test/CodeGen/RISCV/GlobalISel/combine.mir
Modified:
llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
llvm/include/llvm/Target/GlobalISel/Combine.td
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip-rv64.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
index 2ddf20ebe7af7..12e5b31e5817a 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
@@ -816,6 +816,9 @@ class CombinerHelper {
/// Combine zext of trunc.
bool matchZextOfTrunc(const MachineOperand &MO, BuildFnTy &MatchInfo);
+ /// Combine zext nneg to sext.
+ bool matchNonNegZext(const MachineOperand &MO, BuildFnTy &MatchInfo);
+
/// Match constant LHS FP ops that should be commuted.
bool matchCommuteFPConstantToRHS(MachineInstr &MI);
diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index 383589add7755..1ea2652871ab8 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -182,6 +182,7 @@ def FmReassoc : MIFlagEnum<"FmReassoc">;
def IsExact : MIFlagEnum<"IsExact">;
def NoSWrap : MIFlagEnum<"NoSWrap">;
def NoUWrap : MIFlagEnum<"NoUWrap">;
+def NonNeg : MIFlagEnum<"NonNeg">;
def MIFlags;
// def not; -> Already defined as a SDNode
@@ -1546,6 +1547,12 @@ def zext_trunc : GICombineRule<
[{ return Helper.matchZextOfTrunc(${root}, ${matchinfo}); }]),
(apply [{ Helper.applyBuildFnMO(${root}, ${matchinfo}); }])>;
+def nneg_zext : GICombineRule<
+ (defs root:$root, build_fn_matchinfo:$matchinfo),
+ (match (G_ZEXT $root, $x, (MIFlags NonNeg)),
+ [{ return Helper.matchNonNegZext(${root}, ${matchinfo}); }]),
+ (apply [{ Helper.applyBuildFnMO(${root}, ${matchinfo}); }])>;
+
def extract_vector_element_shuffle_vector : GICombineRule<
(defs root:$root, build_fn_matchinfo:$matchinfo),
(match (G_SHUFFLE_VECTOR $src, $src1, $src2, $mask),
@@ -1773,6 +1780,8 @@ def fma_combines : GICombineGroup<[combine_fadd_fmul_to_fmad_or_fma,
def constant_fold_binops : GICombineGroup<[constant_fold_binop,
constant_fold_fp_binop]>;
+def prefer_sign_combines : GICombineGroup<[nneg_zext]>;
+
def all_combines : GICombineGroup<[integer_reassoc_combines, trivial_combines,
vector_ops_combines, freeze_combines,
insert_vec_elt_combines, extract_vec_elt_combines, combines_for_extload,
@@ -1796,7 +1805,7 @@ def all_combines : GICombineGroup<[integer_reassoc_combines, trivial_combines,
sub_add_reg, select_to_minmax, redundant_binop_in_equality,
fsub_to_fneg, commute_constant_to_rhs, match_ands, match_ors,
combine_concat_vector, double_icmp_zero_and_or_combine, match_addos,
- sext_trunc, zext_trunc, combine_shuffle_concat]>;
+ sext_trunc, zext_trunc, prefer_sign_combines, combine_shuffle_concat]>;
// A combine group used to for prelegalizer combiners at -O0. The combines in
// this group have been selected based on experiments to balance code size and
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 29b665c7cbcc4..b516608aa53cd 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -7407,3 +7407,24 @@ bool CombinerHelper::matchZextOfTrunc(const MachineOperand &MO,
return false;
}
+
+bool CombinerHelper::matchNonNegZext(const MachineOperand &MO,
+ BuildFnTy &MatchInfo) {
+ GZext *Zext = cast<GZext>(MRI.getVRegDef(MO.getReg()));
+
+ Register Dst = Zext->getReg(0);
+ Register Src = Zext->getSrcReg();
+
+ LLT DstTy = MRI.getType(Dst);
+ LLT SrcTy = MRI.getType(Src);
+ const auto &TLI = getTargetLowering();
+
+ // Convert zext nneg to sext if sext is the preferred form for the target.
+ if (isLegalOrBeforeLegalizer({TargetOpcode::G_SEXT, {DstTy, SrcTy}}) &&
+ TLI.isSExtCheaperThanZExt(getMVTForLLT(SrcTy), getMVTForLLT(DstTy))) {
+ MatchInfo = [=](MachineIRBuilder &B) { B.buildSExt(Dst, Src); };
+ return true;
+ }
+
+ return false;
+}
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip-rv64.ll b/llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip-rv64.ll
index d4acca17930d5..fd80afce6510e 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip-rv64.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip-rv64.ll
@@ -101,3 +101,13 @@ entry:
%0 = urem i64 %a, %b
ret i64 %0
}
+
+define i64 @zext_nneg_i32_i64(i32 %a) {
+; RV64IM-LABEL: zext_nneg_i32_i64:
+; RV64IM: # %bb.0: # %entry
+; RV64IM-NEXT: sext.w a0, a0
+; RV64IM-NEXT: ret
+entry:
+ %b = zext nneg i32 %a to i64
+ ret i64 %b
+}
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/combine.mir b/llvm/test/CodeGen/RISCV/GlobalISel/combine.mir
new file mode 100644
index 0000000000000..ef3fc4c9d5fae
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/combine.mir
@@ -0,0 +1,20 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -run-pass=riscv-prelegalizer-combiner -mtriple riscv64 %s -o - | FileCheck %s --check-prefix=RV64
+
+---
+name: nneg_zext
+body: |
+ bb.0:
+
+ ; RV64-LABEL: name: nneg_zext
+ ; RV64: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; RV64-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[TRUNC]](s32)
+ ; RV64-NEXT: $x10 = COPY [[SEXT]](s64)
+ ; RV64-NEXT: PseudoRET implicit $x10
+ %0:_(s64) = COPY $x10
+ %2:_(s32) = G_TRUNC %0
+ %3:_(s64) = nneg G_ZEXT %2
+ $x10 = COPY %3(s64)
+ PseudoRET implicit $x10
+...
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