[llvm] 59116e0 - [PowerPC] Update test so that target flags are exposed. NFC.
Kai Luo via llvm-commits
llvm-commits at lists.llvm.org
Fri May 31 22:01:04 PDT 2024
Author: Kai Luo
Date: 2024-06-01T13:00:18+08:00
New Revision: 59116e0941c7f406526fc37acf52845bd8380402
URL: https://github.com/llvm/llvm-project/commit/59116e0941c7f406526fc37acf52845bd8380402
DIFF: https://github.com/llvm/llvm-project/commit/59116e0941c7f406526fc37acf52845bd8380402.diff
LOG: [PowerPC] Update test so that target flags are exposed. NFC.
Added:
Modified:
llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
index ff087a2144488..d62209f4d62e7 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \
; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s \
; RUN: --check-prefix=SMALL32
@@ -25,8 +26,8 @@ define void @storesTGInit(i64 %Val) #0 {
; SMALL32-NEXT: stwu 1, -32(1)
; SMALL32-NEXT: mr 6, 4
; SMALL32-NEXT: mr 7, 3
-; SMALL32-NEXT: lwz 3, L..C0(2)
-; SMALL32-NEXT: lwz 4, L..C1(2)
+; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit
+; SMALL32-NEXT: lwz 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit
; SMALL32-NEXT: stw 0, 40(1)
; SMALL32-NEXT: bla .__tls_get_addr[PR]
; SMALL32-NEXT: stw 6, 4(3)
@@ -60,8 +61,8 @@ define void @storesTGInit(i64 %Val) #0 {
; SMALL64-NEXT: mflr 0
; SMALL64-NEXT: stdu 1, -48(1)
; SMALL64-NEXT: mr 6, 3
-; SMALL64-NEXT: ld 3, L..C0(2)
-; SMALL64-NEXT: ld 4, L..C1(2)
+; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit
+; SMALL64-NEXT: ld 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit
; SMALL64-NEXT: std 0, 64(1)
; SMALL64-NEXT: bla .__tls_get_addr[PR]
; SMALL64-NEXT: std 6, 0(3)
@@ -98,11 +99,11 @@ define void @storesTIUninit(i64 %Val) #0 {
; SMALL32-NEXT: mflr 0
; SMALL32-NEXT: stwu 1, -32(1)
; SMALL32-NEXT: mr 7, 3
-; SMALL32-NEXT: lwz 3, L..C2(2)
+; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"
; SMALL32-NEXT: stw 0, 40(1)
; SMALL32-NEXT: mr 6, 4
; SMALL32-NEXT: bla .__tls_get_mod[PR]
-; SMALL32-NEXT: lwz 4, L..C3(2)
+; SMALL32-NEXT: lwz 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit
; SMALL32-NEXT: stwux 7, 3, 4
; SMALL32-NEXT: stw 6, 4(3)
; SMALL32-NEXT: addi 1, 1, 32
@@ -134,10 +135,10 @@ define void @storesTIUninit(i64 %Val) #0 {
; SMALL64-NEXT: mflr 0
; SMALL64-NEXT: stdu 1, -48(1)
; SMALL64-NEXT: mr 6, 3
-; SMALL64-NEXT: ld 3, L..C2(2)
+; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"
; SMALL64-NEXT: std 0, 64(1)
; SMALL64-NEXT: bla .__tls_get_mod[PR]
-; SMALL64-NEXT: ld 4, L..C3(2)
+; SMALL64-NEXT: ld 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit
; SMALL64-NEXT: stdx 6, 3, 4
; SMALL64-NEXT: addi 1, 1, 48
; SMALL64-NEXT: ld 0, 16(1)
@@ -172,11 +173,11 @@ define void @storesTIInit(i64 %Val) #0 {
; SMALL32-NEXT: mflr 0
; SMALL32-NEXT: stwu 1, -32(1)
; SMALL32-NEXT: mr 7, 3
-; SMALL32-NEXT: lwz 3, L..C2(2)
+; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"
; SMALL32-NEXT: stw 0, 40(1)
; SMALL32-NEXT: mr 6, 4
; SMALL32-NEXT: bla .__tls_get_mod[PR]
-; SMALL32-NEXT: lwz 4, L..C4(2)
+; SMALL32-NEXT: lwz 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit
; SMALL32-NEXT: stwux 7, 3, 4
; SMALL32-NEXT: stw 6, 4(3)
; SMALL32-NEXT: addi 1, 1, 32
@@ -208,10 +209,10 @@ define void @storesTIInit(i64 %Val) #0 {
; SMALL64-NEXT: mflr 0
; SMALL64-NEXT: stdu 1, -48(1)
; SMALL64-NEXT: mr 6, 3
-; SMALL64-NEXT: ld 3, L..C2(2)
+; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"
; SMALL64-NEXT: std 0, 64(1)
; SMALL64-NEXT: bla .__tls_get_mod[PR]
-; SMALL64-NEXT: ld 4, L..C4(2)
+; SMALL64-NEXT: ld 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit
; SMALL64-NEXT: stdx 6, 3, 4
; SMALL64-NEXT: addi 1, 1, 48
; SMALL64-NEXT: ld 0, 16(1)
@@ -247,8 +248,8 @@ define void @storesTWInit(i64 %Val) #0 {
; SMALL32-NEXT: stwu 1, -32(1)
; SMALL32-NEXT: mr 6, 4
; SMALL32-NEXT: mr 7, 3
-; SMALL32-NEXT: lwz 3, L..C5(2)
-; SMALL32-NEXT: lwz 4, L..C6(2)
+; SMALL32-NEXT: lwz 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit
+; SMALL32-NEXT: lwz 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit
; SMALL32-NEXT: stw 0, 40(1)
; SMALL32-NEXT: bla .__tls_get_addr[PR]
; SMALL32-NEXT: stw 6, 4(3)
@@ -282,8 +283,8 @@ define void @storesTWInit(i64 %Val) #0 {
; SMALL64-NEXT: mflr 0
; SMALL64-NEXT: stdu 1, -48(1)
; SMALL64-NEXT: mr 6, 3
-; SMALL64-NEXT: ld 3, L..C5(2)
-; SMALL64-NEXT: ld 4, L..C6(2)
+; SMALL64-NEXT: ld 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit
+; SMALL64-NEXT: ld 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit
; SMALL64-NEXT: std 0, 64(1)
; SMALL64-NEXT: bla .__tls_get_addr[PR]
; SMALL64-NEXT: std 6, 0(3)
@@ -319,11 +320,11 @@ define i64 @loadsTGInit() #1 {
; SMALL32: # %bb.0: # %entry
; SMALL32-NEXT: mflr 0
; SMALL32-NEXT: stwu 1, -32(1)
-; SMALL32-NEXT: lwz 3, L..C0(2)
-; SMALL32-NEXT: lwz 4, L..C1(2)
+; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit
+; SMALL32-NEXT: lwz 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit
; SMALL32-NEXT: stw 0, 40(1)
; SMALL32-NEXT: bla .__tls_get_addr[PR]
-; SMALL32-NEXT: lwz 4, L..C7(2)
+; SMALL32-NEXT: lwz 4, L..C7(2) # @GInit
; SMALL32-NEXT: lwz 5, 4(3)
; SMALL32-NEXT: lwz 6, 4(4)
; SMALL32-NEXT: lwz 3, 0(3)
@@ -362,11 +363,11 @@ define i64 @loadsTGInit() #1 {
; SMALL64: # %bb.0: # %entry
; SMALL64-NEXT: mflr 0
; SMALL64-NEXT: stdu 1, -48(1)
-; SMALL64-NEXT: ld 3, L..C0(2)
-; SMALL64-NEXT: ld 4, L..C1(2)
+; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsgdm) @TGInit
+; SMALL64-NEXT: ld 4, L..C1(2) # target-flags(ppc-tlsgd) @TGInit
; SMALL64-NEXT: std 0, 64(1)
; SMALL64-NEXT: bla .__tls_get_addr[PR]
-; SMALL64-NEXT: ld 4, L..C7(2)
+; SMALL64-NEXT: ld 4, L..C7(2) # @GInit
; SMALL64-NEXT: ld 3, 0(3)
; SMALL64-NEXT: ld 4, 0(4)
; SMALL64-NEXT: add 3, 4, 3
@@ -407,11 +408,11 @@ define i64 @loadsTIUninit() #1 {
; SMALL32: # %bb.0: # %entry
; SMALL32-NEXT: mflr 0
; SMALL32-NEXT: stwu 1, -32(1)
-; SMALL32-NEXT: lwz 3, L..C2(2)
+; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"
; SMALL32-NEXT: stw 0, 40(1)
; SMALL32-NEXT: bla .__tls_get_mod[PR]
-; SMALL32-NEXT: lwz 4, L..C3(2)
-; SMALL32-NEXT: lwz 5, L..C7(2)
+; SMALL32-NEXT: lwz 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit
+; SMALL32-NEXT: lwz 5, L..C7(2) # @GInit
; SMALL32-NEXT: lwzux 6, 3, 4
; SMALL32-NEXT: lwz 4, 4(5)
; SMALL32-NEXT: lwz 3, 4(3)
@@ -450,12 +451,12 @@ define i64 @loadsTIUninit() #1 {
; SMALL64: # %bb.0: # %entry
; SMALL64-NEXT: mflr 0
; SMALL64-NEXT: stdu 1, -48(1)
-; SMALL64-NEXT: ld 3, L..C2(2)
+; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"
; SMALL64-NEXT: std 0, 64(1)
; SMALL64-NEXT: bla .__tls_get_mod[PR]
-; SMALL64-NEXT: ld 4, L..C3(2)
+; SMALL64-NEXT: ld 4, L..C3(2) # target-flags(ppc-tlsld) @TIUninit
; SMALL64-NEXT: ldx 3, 3, 4
-; SMALL64-NEXT: ld 4, L..C7(2)
+; SMALL64-NEXT: ld 4, L..C7(2) # @GInit
; SMALL64-NEXT: ld 4, 0(4)
; SMALL64-NEXT: add 3, 4, 3
; SMALL64-NEXT: addi 1, 1, 48
@@ -495,11 +496,11 @@ define i64 @loadsTIInit() #1 {
; SMALL32: # %bb.0: # %entry
; SMALL32-NEXT: mflr 0
; SMALL32-NEXT: stwu 1, -32(1)
-; SMALL32-NEXT: lwz 3, L..C2(2)
+; SMALL32-NEXT: lwz 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"
; SMALL32-NEXT: stw 0, 40(1)
; SMALL32-NEXT: bla .__tls_get_mod[PR]
-; SMALL32-NEXT: lwz 4, L..C4(2)
-; SMALL32-NEXT: lwz 5, L..C7(2)
+; SMALL32-NEXT: lwz 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit
+; SMALL32-NEXT: lwz 5, L..C7(2) # @GInit
; SMALL32-NEXT: lwzux 6, 3, 4
; SMALL32-NEXT: lwz 4, 4(5)
; SMALL32-NEXT: lwz 3, 4(3)
@@ -538,12 +539,12 @@ define i64 @loadsTIInit() #1 {
; SMALL64: # %bb.0: # %entry
; SMALL64-NEXT: mflr 0
; SMALL64-NEXT: stdu 1, -48(1)
-; SMALL64-NEXT: ld 3, L..C2(2)
+; SMALL64-NEXT: ld 3, L..C2(2) # target-flags(ppc-tlsldm) @"_$TLSML"
; SMALL64-NEXT: std 0, 64(1)
; SMALL64-NEXT: bla .__tls_get_mod[PR]
-; SMALL64-NEXT: ld 4, L..C4(2)
+; SMALL64-NEXT: ld 4, L..C4(2) # target-flags(ppc-tlsld) @TIInit
; SMALL64-NEXT: ldx 3, 3, 4
-; SMALL64-NEXT: ld 4, L..C7(2)
+; SMALL64-NEXT: ld 4, L..C7(2) # @GInit
; SMALL64-NEXT: ld 4, 0(4)
; SMALL64-NEXT: add 3, 4, 3
; SMALL64-NEXT: addi 1, 1, 48
@@ -583,11 +584,11 @@ define i64 @loadsTWInit() #1 {
; SMALL32: # %bb.0: # %entry
; SMALL32-NEXT: mflr 0
; SMALL32-NEXT: stwu 1, -32(1)
-; SMALL32-NEXT: lwz 3, L..C5(2)
-; SMALL32-NEXT: lwz 4, L..C6(2)
+; SMALL32-NEXT: lwz 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit
+; SMALL32-NEXT: lwz 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit
; SMALL32-NEXT: stw 0, 40(1)
; SMALL32-NEXT: bla .__tls_get_addr[PR]
-; SMALL32-NEXT: lwz 4, L..C7(2)
+; SMALL32-NEXT: lwz 4, L..C7(2) # @GInit
; SMALL32-NEXT: lwz 5, 4(3)
; SMALL32-NEXT: lwz 6, 4(4)
; SMALL32-NEXT: lwz 3, 0(3)
@@ -626,11 +627,11 @@ define i64 @loadsTWInit() #1 {
; SMALL64: # %bb.0: # %entry
; SMALL64-NEXT: mflr 0
; SMALL64-NEXT: stdu 1, -48(1)
-; SMALL64-NEXT: ld 3, L..C5(2)
-; SMALL64-NEXT: ld 4, L..C6(2)
+; SMALL64-NEXT: ld 3, L..C5(2) # target-flags(ppc-tlsgdm) @TWInit
+; SMALL64-NEXT: ld 4, L..C6(2) # target-flags(ppc-tlsgd) @TWInit
; SMALL64-NEXT: std 0, 64(1)
; SMALL64-NEXT: bla .__tls_get_addr[PR]
-; SMALL64-NEXT: ld 4, L..C7(2)
+; SMALL64-NEXT: ld 4, L..C7(2) # @GInit
; SMALL64-NEXT: ld 3, 0(3)
; SMALL64-NEXT: ld 4, 0(4)
; SMALL64-NEXT: add 3, 4, 3
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