[llvm] [RISCV][LoopIdiom] Support VP intrinsics in LoopIdiomTransform (PR #94082)

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git-clang-format --diff 42b5daba504a8b4fd60a57dde93ee5d0118abf0b 764aac0d12e0d66841d2807f3b6a6489009ca125 -- llvm/include/llvm/Transforms/Vectorize/LoopIdiomTransform.h llvm/lib/Passes/PassBuilder.cpp llvm/lib/Target/AArch64/AArch64.h llvm/lib/Target/AArch64/AArch64TargetMachine.cpp llvm/lib/Target/AArch64/AArch64TargetMachine.h llvm/lib/Target/RISCV/RISCVTargetMachine.cpp llvm/lib/Target/RISCV/RISCVTargetMachine.h llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h llvm/lib/Transforms/Vectorize/LoopIdiomTransform.cpp
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diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index 19e0d1e2f5..f6714e7ccc 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -89,7 +89,7 @@ void initializeAArch64DAGToDAGISelPass(PassRegistry &);
 void initializeAArch64DeadRegisterDefinitionsPass(PassRegistry&);
 void initializeAArch64ExpandPseudoPass(PassRegistry &);
 void initializeAArch64GlobalsTaggingPass(PassRegistry &);
-void initializeAArch64LoadStoreOptPass(PassRegistry&);
+void initializeAArch64LoadStoreOptPass(PassRegistry &);
 void initializeAArch64LowerHomogeneousPrologEpilogPass(PassRegistry &);
 void initializeAArch64MIPeepholeOptPass(PassRegistry &);
 void initializeAArch64O0PreLegalizerCombinerPass(PassRegistry &);

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https://github.com/llvm/llvm-project/pull/94082