[llvm] [RISCV] Lower llvm.clear_cache to __riscv_flush_icache for glibc targets (PR #93481)

[Matt Arsenault via llvm-commits]

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@@ -7117,7 +7122,48 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
     return lowerVPSpliceExperimental(Op, DAG);
   case ISD::EXPERIMENTAL_VP_REVERSE:
     return lowerVPReverseExperimental(Op, DAG);
+  case ISD::CLEAR_CACHE: {
+    assert(Subtarget.getTargetTriple().isOSGlibc() &&
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arsenm wrote:

Should get from target machine, not subtarget 

https://github.com/llvm/llvm-project/pull/93481