[llvm] AMDGPU: Generalize instruction shrinking code (PR #93810)

[via llvm-commits]

github-actions[bot] wrote:

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``````````bash
git-clang-format --diff 49ef21d7674fa8267d674879e21b69d9ca4e6203 915a5f20af9b2da401a1b085a4ab7f0157e7df8e -- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 29c1c310cd..b14472279d 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -4489,8 +4489,7 @@ MachineInstr *SIInstrInfo::buildShrunkInst(MachineInstr &MI,
 
   const MCInstrDesc &Op32Desc = get(Op32);
   MachineInstrBuilder Inst32 =
-    BuildMI(*MBB, MI, MI.getDebugLoc(), Op32Desc)
-    .setMIFlags(MI.getFlags());
+      BuildMI(*MBB, MI, MI.getDebugLoc(), Op32Desc).setMIFlags(MI.getFlags());
 
   // Add the dst operand if the 32-bit encoding also has an explicit $vdst.
   // For VOPC instructions, this is replaced by an implicit def of vcc.

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https://github.com/llvm/llvm-project/pull/93810